738a5643ad
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19759 a1c6a512-1295-4272-9138-f99709370657
665 lines
19 KiB
C
665 lines
19 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 by Daniel Stenberg
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __CONFIG_H__
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#define __CONFIG_H__
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#ifndef __PCTOOL__
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#include "autoconf.h"
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#endif
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/* symbolic names for multiple choice configurations: */
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/* CONFIG_STORAGE (note these are combineable bit-flags) */
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#define STORAGE_ATA 0x01
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#define STORAGE_MMC 0x02
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#define STORAGE_SD 0x04
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#define STORAGE_NAND 0x08
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#define STORAGE_RAMDISK 0x10
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/* CONFIG_TUNER (note these are combineable bit-flags) */
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#define S1A0903X01 0x01 /* Samsung */
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#define TEA5767 0x02 /* Philips */
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#define LV24020LP 0x04 /* Sanyo */
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#define SI4700 0x08 /* Silicon Labs */
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#define TEA5760 0x10 /* Philips */
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#define LV240000 0x20 /* Sanyo */
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/* CONFIG_CODEC */
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#define MAS3587F 3587
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#define MAS3507D 3507
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#define MAS3539F 3539
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#define SWCODEC 1 /* if codec is done by SW */
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/* CONFIG_CPU */
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#define SH7034 7034
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#define MCF5249 5249
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#define MCF5250 5250
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#define PP5002 5002
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#define PP5020 5020
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#define PP5022 5022
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#define PP5024 5024
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#define PNX0101 101
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#define S3C2440 2440
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#define DSC25 25
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#define DM320 320
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#define IMX31L 31
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#define TCC770 770
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#define TCC771L 771
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#define TCC773L 773
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#define TCC7801 7801
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#define S5L8700 8700
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#define JZ4732 4732
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#define AS3525 3525
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/* CONFIG_KEYPAD */
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#define PLAYER_PAD 1
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#define RECORDER_PAD 2
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#define ONDIO_PAD 3
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#define IRIVER_H100_PAD 4
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#define IRIVER_H300_PAD 5
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#define IAUDIO_X5M5_PAD 6
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#define IPOD_4G_PAD 7
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#define IPOD_3G_PAD 8
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#define IPOD_1G2G_PAD 9
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#define IRIVER_IFP7XX_PAD 10
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#define GIGABEAT_PAD 11
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#define IRIVER_H10_PAD 12
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#define SANSA_E200_PAD 13
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#define SANSA_C200_PAD 14
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#define ELIO_TPJ1022_PAD 15
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#define ARCHOS_AV300_PAD 16
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#define MROBE100_PAD 17
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#define MROBE500_PAD 18
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#define GIGABEAT_S_PAD 19
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#define LOGIK_DAX_PAD 20
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#define IAUDIO67_PAD 21
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#define COWOND2_PAD 22
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#define IAUDIO_M3_PAD 23
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#define CREATIVEZVM_PAD 24
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#define SANSA_M200_PAD 25
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#define CREATIVEZV_PAD 26
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#define PHILIPS_SA9200_PAD 27
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#define SANSA_C100_PAD 28
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#define PHILIPS_HDD1630_PAD 29
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#define MEIZU_M6SL_PAD 30
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#define ONDAVX747_PAD 31
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#define ONDAVX767_PAD 32
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#define MEIZU_M6SP_PAD 33
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#define MEIZU_M3_PAD 34
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#define SANSA_CLIP_PAD 35
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#define SANSA_FUZE_PAD 36
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/* CONFIG_REMOTE_KEYPAD */
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#define H100_REMOTE 1
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#define H300_REMOTE 2
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#define X5_REMOTE 3
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/* CONFIG_CHARGING */
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/* Generic types */
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#define CHARGING_SIMPLE 1 /* Simple, hardware controlled charging
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* (CPU cannot read charger state but may read
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* when power is plugged-in). */
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#define CHARGING_MONITOR 2 /* Hardware controlled charging with monitoring
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* (CPU is able to read HW charging state and
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* when power is plugged-in). */
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/* Mostly target-specific code in the /target tree */
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#define CHARGING_TARGET 3 /* Any algorithm - usually software controlled
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* charging or specific programming is required to
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* use the charging hardware. */
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/* CONFIG_LCD */
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#define LCD_SSD1815 1 /* as used by Archos Recorders and Ondios */
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#define LCD_SSD1801 2 /* as used by Archos Player/Studio */
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#define LCD_S1D15E06 3 /* as used by iRiver H100 series */
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#define LCD_H300 4 /* as used by iRiver H300 series, exact model name is
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unknown at the time of this writing */
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#define LCD_X5 5 /* as used by iAudio X5 series, exact model name is
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unknown at the time of this writing */
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#define LCD_IPODCOLOR 6 /* as used by iPod Color/Photo */
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#define LCD_IPODNANO 7 /* as used by iPod Nano */
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#define LCD_IPODVIDEO 8 /* as used by iPod Video */
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#define LCD_IPOD2BPP 9 /* as used by all fullsize greyscale iPods */
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#define LCD_IPODMINI 10 /* as used by iPod Mini g1/g2 */
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#define LCD_IFP7XX 11 /* as used by iRiver iFP 7xx/8xx */
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#define LCD_GIGABEAT 12
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#define LCD_H10_20GB 13 /* as used by iriver H10 20Gb */
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#define LCD_H10_5GB 14 /* as used by iriver H10 5Gb */
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#define LCD_TPJ1022 15 /* as used by Tatung Elio TPJ-1022 */
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#define LCD_DSC25 16 /* as used by Archos AV300 */
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#define LCD_C200 17 /* as used by Sandisk Sansa c200 */
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#define LCD_MROBE500 18 /* as used by Olympus M:Robe 500i */
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#define LCD_MROBE100 19 /* as used by Olympus M:Robe 100 */
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#define LCD_LOGIKDAX 20 /* as used by Logik DAX - SSD1815 */
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#define LCD_IAUDIO67 21 /* as used by iAudio 6/7 - unknown */
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#define LCD_CREATIVEZVM 22 /* as used by Creative Zen Vision:M */
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#define LCD_TL0350A 23 /* as used by the iAudio M3 remote, treated as main LCD */
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#define LCD_COWOND2 24 /* as used by Cowon D2 - LTV250QV, TCC7801 driver */
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#define LCD_SA9200 25 /* as used by the Philips SA9200 */
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#define LCD_S6B33B2 26 /* as used by the Sansa c100 */
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#define LCD_HDD1630 27 /* as used by the Philips HDD1630 */
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#define LCD_MEIZUM6 28 /* as used by the Meizu M6SP and M6SL (various models) */
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#define LCD_ONDAVX747 29 /* as used by the Onda VX747 */
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#define LCD_ONDAVX767 30 /* as used by the Onda VX767 */
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#define LCD_SSD1303 31 /* as used by the Sansa Clip */
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#define LCD_FUZE 32 /* as used by the Sansa Fuze */
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/* LCD_PIXELFORMAT */
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#define HORIZONTAL_PACKING 1
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#define VERTICAL_PACKING 2
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#define HORIZONTAL_INTERLEAVED 3
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#define VERTICAL_INTERLEAVED 4
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#define RGB565 565
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#define RGB565SWAPPED 3553
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/* CONFIG_ORIENTATION */
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#define SCREEN_PORTRAIT 0
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#define SCREEN_LANDSCAPE 1
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#define SCREEN_SQUARE 2
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/* CONFIG_I2C */
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#define I2C_PLAYREC 1 /* Archos Player/Recorder style */
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#define I2C_ONDIO 2 /* Ondio style */
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#define I2C_COLDFIRE 3 /* Coldfire style */
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#define I2C_PP5002 4 /* PP5002 style */
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#define I2C_PP5020 5 /* PP5020 style */
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#define I2C_PNX0101 6 /* PNX0101 style */
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#define I2C_S3C2440 7
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#define I2C_PP5024 8 /* PP5024 style */
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#define I2C_IMX31L 9
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#define I2C_TCC77X 10
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#define I2C_TCC780X 11
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#define I2C_DM320 12 /* DM320 style */
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#define I2C_S5L8700 13
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#define I2C_JZ47XX 14 /* Ingenic Jz47XX style */
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#define I2C_AS3525 15
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/* CONFIG_LED */
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#define LED_REAL 1 /* SW controlled LED (Archos recorders, player) */
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#define LED_VIRTUAL 2 /* Virtual LED (icon) (Archos Ondio) */
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/* else HW controlled LED (iRiver H1x0) */
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/* CONFIG_NAND */
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#define NAND_IFP7XX 1
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#define NAND_TCC 2
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#define NAND_SAMSUNG 3
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#define NAND_CC 4 /* ChinaChip */
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/* CONFIG_RTC */
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#define RTC_M41ST84W 1 /* Archos Recorder */
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#define RTC_PCF50605 2 /* iPod 3G, 4G & Mini */
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#define RTC_PCF50606 3 /* iriver H300 */
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#define RTC_S3C2440 4
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#define RTC_E8564 5 /* iriver H10 */
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#define RTC_AS3514 6 /* Sandisk Sansa series */
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#define RTC_DS1339_DS3231 7 /* h1x0 RTC mod */
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#define RTC_IMX31L 8
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#define RTC_RX5X348AB 9
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#define RTC_TCC77X 10
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#define RTC_TCC780X 11
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#define RTC_MR100 12
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#define RTC_MC13783 13 /* Freescale MC13783 PMIC */
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#define RTC_S5L8700 14
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#define RTC_S35390A 15
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#define RTC_JZ47XX 16 /* Ingenic Jz47XX */
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/* USB On-the-go */
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#define USBOTG_ISP1362 1362 /* iriver H300 */
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#define USBOTG_ISP1583 1583 /* Creative Zen Vision:M */
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#define USBOTG_M5636 5636 /* iAudio X5 */
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#define USBOTG_ARC 5020 /* PortalPlayer 502x */
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#define USBOTG_JZ4740 4740 /* Ingenic Jz4740/Jz4732 */
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#define USBOTG_AS3525 3525 /* AMS AS3525 */
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/* Multiple cores */
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#define CPU 0
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#define COP 1
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/* now go and pick yours */
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#if defined(ARCHOS_PLAYER)
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#include "config-player.h"
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#elif defined(ARCHOS_RECORDER)
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#include "config-recorder.h"
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#elif defined(ARCHOS_FMRECORDER)
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#include "config-fmrecorder.h"
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#elif defined(ARCHOS_RECORDERV2)
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#include "config-recorderv2.h"
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#elif defined(ARCHOS_ONDIOSP)
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#include "config-ondiosp.h"
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#elif defined(ARCHOS_ONDIOFM)
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#include "config-ondiofm.h"
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#elif defined(ARCHOS_AV300)
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#include "config-av300.h"
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#elif defined(IRIVER_H100)
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#include "config-h100.h"
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#elif defined(IRIVER_H120)
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#include "config-h120.h"
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#elif defined(IRIVER_H300)
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#include "config-h300.h"
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#elif defined(IAUDIO_X5)
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#include "config-iaudiox5.h"
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#elif defined(IAUDIO_M5)
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#include "config-iaudiom5.h"
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#elif defined(IAUDIO_M3)
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#include "config-iaudiom3.h"
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#elif defined(IPOD_COLOR)
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#include "config-ipodcolor.h"
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#elif defined(IPOD_NANO)
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#include "config-ipodnano.h"
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#elif defined(IPOD_VIDEO)
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#include "config-ipodvideo.h"
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#elif defined(IPOD_1G2G)
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#include "config-ipod1g2g.h"
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#elif defined(IPOD_3G)
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#include "config-ipod3g.h"
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#elif defined(IPOD_4G)
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#include "config-ipod4g.h"
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#elif defined(IRIVER_IFP7XX)
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#include "config-ifp7xx.h"
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#elif defined(GIGABEAT_F)
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#include "config-gigabeat.h"
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#elif defined(GIGABEAT_S)
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#include "config-gigabeat-s.h"
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#elif defined(IPOD_MINI)
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#include "config-ipodmini.h"
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#elif defined(IPOD_MINI2G)
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#include "config-ipodmini2g.h"
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#elif defined(IRIVER_H10)
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#include "config-h10.h"
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#elif defined(IRIVER_H10_5GB)
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#include "config-h10_5gb.h"
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#elif defined(SANSA_E200)
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#include "config-e200.h"
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#elif defined(SANSA_C200)
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#include "config-c200.h"
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#elif defined(SANSA_M200)
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#include "config-m200.h"
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#elif defined(ELIO_TPJ1022)
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#include "config-tpj1022.h"
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#elif defined(MROBE_100)
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#include "config-mrobe100.h"
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#elif defined(MROBE_500)
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#include "config-mrobe500.h"
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#elif defined(LOGIK_DAX)
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#include "config-logikdax.h"
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#elif defined(IAUDIO_7)
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#include "config-iaudio7.h"
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#elif defined(COWON_D2)
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#include "config-cowond2.h"
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#elif defined(CREATIVE_ZVM)
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#include "config-creativezvm.h"
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#elif defined(CREATIVE_ZVM60GB)
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#include "config-creativezvm60gb.h"
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#elif defined(CREATIVE_ZV)
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#include "config-creativezv.h"
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#elif defined(PHILIPS_SA9200)
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#include "config-sa9200.h"
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#elif defined(PHILIPS_HDD1630)
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#include "config-hdd1630.h"
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#elif defined(SANSA_C100)
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#include "config-c100.h"
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#elif defined(MEIZU_M6SL)
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#include "config-meizu-m6sl.h"
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#elif defined(MEIZU_M6SP)
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#include "config-meizu-m6sp.h"
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#elif defined(MEIZU_M3)
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#include "config-meizu-m3.h"
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#elif defined(ONDA_VX747)
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#include "config-ondavx747.h"
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#elif defined(ONDA_VX747P)
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#include "config-ondavx747p.h"
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#elif defined(ONDA_VX767)
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#include "config-ondavx767.h"
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#elif defined(SANSA_CLIP)
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#include "config-clip.h"
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#elif defined(SANSA_E200V2)
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#include "config-e200v2.h"
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#elif defined(SANSA_M200V4)
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#include "config-m200v4.h"
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#elif defined(SANSA_FUZE)
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#include "config-fuze.h"
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#elif defined(SANSA_C200V2)
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#include "config-c200v2.h"
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#else
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/* no known platform */
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#endif
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/* setup basic macros from capability masks */
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#include "config_caps.h"
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/* now set any CONFIG_ defines correctly if they are not used,
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No need to do this on CONFIG_'s which are compulsary (e.g CONFIG_CODEC ) */
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#ifndef CONFIG_TUNER
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#define CONFIG_TUNER 0
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#endif
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#ifndef CONFIG_USBOTG
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#define CONFIG_USBOTG 0
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#endif
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#ifndef CONFIG_LED
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#define CONFIG_LED 0
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#endif
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#ifndef CONFIG_CHARGING
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#define CONFIG_CHARGING 0
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#endif
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#ifndef CONFIG_RTC
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#define CONFIG_RTC 0
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#endif
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#ifndef CONFIG_ORIENTATION
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#if LCD_HEIGHT > LCD_WIDTH
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#define CONFIG_ORIENTATION SCREEN_PORTRAIT
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#elif LCD_HEIGHT < LCD_WIDTH
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#define CONFIG_ORIENTATION SCREEN_LANDSCAPE
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#else
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#define CONFIG_ORIENTATION SCREEN_SQUARE
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#endif
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#endif
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/* Pixel aspect ratio is defined in terms of a multiplier for pixel width and
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* height, and is set to 1:1 if the target does not set a value
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*/
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#ifndef LCD_PIXEL_ASPECT_HEIGHT
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#define LCD_PIXEL_ASPECT_HEIGHT 1
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#endif
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#ifndef LCD_PIXEL_ASPECT_WIDTH
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#define LCD_PIXEL_ASPECT_WIDTH 1
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#endif
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/* define this in the target config.h to use a different size */
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#ifndef CONFIG_DEFAULT_ICON_HEIGHT
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#define CONFIG_DEFAULT_ICON_HEIGHT 8
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#endif
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#ifndef CONFIG_DEFAULT_ICON_WIDTH
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#define CONFIG_DEFAULT_ICON_WIDTH 6
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#endif
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#ifndef CONFIG_REMOTE_DEFAULT_ICON_HEIGHT
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#define CONFIG_REMOTE_DEFAULT_ICON_HEIGHT 8
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#endif
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#ifndef CONFIG_REMOTE_DEFAULT_ICON_WIDTH
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#define CONFIG_REMOTE_DEFAULT_ICON_WIDTH 6
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#endif
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#if (CONFIG_TUNER & (CONFIG_TUNER - 1)) != 0
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/* Multiple possible tuners */
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#define CONFIG_TUNER_MULTI
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#endif
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#if (CONFIG_STORAGE & (CONFIG_STORAGE - 1)) != 0
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/* Multiple storage drivers */
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#define CONFIG_STORAGE_MULTI
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#endif
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#if defined(BOOTLOADER) && defined(HAVE_ADJUSTABLE_CPU_FREQ)
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/* Bootloaders don't use CPU frequency adjustment */
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#undef HAVE_ADJUSTABLE_CPU_FREQ
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#endif
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/* Enable the directory cache and tagcache in RAM if we have
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* plenty of RAM. Both features can be enabled independently. */
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#if ((defined(MEMORYSIZE) && (MEMORYSIZE > 8)) || MEM > 8) && \
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!defined(BOOTLOADER)
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#define HAVE_DIRCACHE
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#ifdef HAVE_TAGCACHE
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#define HAVE_TC_RAMCACHE
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#endif
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#endif
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/* Add one HAVE_ define for all mas35xx targets */
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#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3507D) || (CONFIG_CODEC == MAS3539F)
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#define HAVE_MAS35XX
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#endif
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#if (CONFIG_CODEC == SWCODEC)
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#ifdef BOOTLOADER
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#if CONFIG_CPU == IMX31L
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/* Priority in bootloader is wanted */
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#define HAVE_PRIORITY_SCHEDULING
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#endif
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#else /* !BOOTLOADER */
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#define HAVE_EXTENDED_MESSAGING_AND_NAME
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#ifndef SIMULATOR
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#define HAVE_PRIORITY_SCHEDULING
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#define HAVE_SCHEDULER_BOOSTCTRL
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#endif /* SIMULATOR */
|
|
|
|
#define HAVE_SEMAPHORE_OBJECTS
|
|
|
|
#ifdef TOSHIBA_GIGABEAT_F
|
|
#define HAVE_WAKEUP_OBJECTS
|
|
#endif
|
|
|
|
#endif /* BOOTLOADER */
|
|
|
|
#if defined(HAVE_USBSTACK) || (CONFIG_CPU == JZ4732) || (CONFIG_CPU == AS3525)
|
|
#define HAVE_WAKEUP_OBJECTS
|
|
#endif
|
|
|
|
#endif /* (CONFIG_CODEC == SWCODEC) */
|
|
|
|
/* define for all cpus from SH family */
|
|
#if (CONFIG_CPU == SH7034)
|
|
#define CPU_SH
|
|
#endif
|
|
|
|
/* define for all cpus from coldfire family */
|
|
#if (CONFIG_CPU == MCF5249) || (CONFIG_CPU == MCF5250)
|
|
#define CPU_COLDFIRE
|
|
#endif
|
|
|
|
/* define for all cpus from PP family */
|
|
#if (CONFIG_CPU == PP5002)
|
|
#define CPU_PP
|
|
#elif (CONFIG_CPU == PP5020) || (CONFIG_CPU == PP5022) || (CONFIG_CPU == PP5024)
|
|
#define CPU_PP
|
|
#define CPU_PP502x
|
|
#endif
|
|
|
|
/* define for all cpus from TCC77X family */
|
|
#if (CONFIG_CPU == TCC771L) || (CONFIG_CPU == TCC773L) || (CONFIG_CPU == TCC770)
|
|
#define CPU_TCC77X
|
|
#endif
|
|
|
|
/* define for all cpus from TCC780 family */
|
|
#if (CONFIG_CPU == TCC7801)
|
|
#define CPU_TCC780X
|
|
#endif
|
|
|
|
/* define for all cpus from ARM7TDMI family (for specific optimisations) */
|
|
#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == DSC25)
|
|
#define CPU_ARM7TDMI
|
|
#endif
|
|
|
|
/* define for all cpus from ARM family */
|
|
#if (CONFIG_CPU == IMX31L)
|
|
#define CPU_ARM
|
|
#define ARM_ARCH 6 /* ARMv6 */
|
|
#endif
|
|
|
|
#if defined(CPU_TCC77X) || defined(CPU_TCC780X) || (CONFIG_CPU == DM320)
|
|
#define CPU_ARM
|
|
#define ARM_ARCH 5 /* ARMv5 */
|
|
#endif
|
|
|
|
#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == S3C2440) \
|
|
|| (CONFIG_CPU == DSC25) || (CONFIG_CPU == S5L8700) || (CONFIG_CPU == AS3525)
|
|
#define CPU_ARM
|
|
#define ARM_ARCH 4 /* ARMv4 */
|
|
#endif
|
|
|
|
/* Determine if accesses should be strictly long aligned. */
|
|
#if (CONFIG_CPU == SH7034) || defined(CPU_ARM)
|
|
#define ROCKBOX_STRICT_ALIGN 1
|
|
#endif
|
|
|
|
#if (CONFIG_CPU == JZ4732)
|
|
#define CPU_MIPS 32
|
|
#endif
|
|
|
|
#ifndef CODEC_SIZE
|
|
#define CODEC_SIZE 0
|
|
#endif
|
|
|
|
/* This attribute can be used to ensure that certain symbols are never profiled
|
|
* which can be important as profiling a function de-inlines it */
|
|
#ifdef RB_PROFILE
|
|
#define NO_PROF_ATTR __attribute__ ((no_instrument_function))
|
|
#else
|
|
#define NO_PROF_ATTR
|
|
#endif
|
|
|
|
/* IRAM usage */
|
|
#if !defined(SIMULATOR) && /* Not for simulators */ \
|
|
(((CONFIG_CPU == SH7034) && !defined(PLUGIN)) || /* SH1 archos: core only */ \
|
|
defined(CPU_COLDFIRE) || /* Coldfire: core, plugins, codecs */ \
|
|
defined(CPU_PP) || /* PortalPlayer: core, plugins, codecs */ \
|
|
(CONFIG_CPU == PNX0101) || \
|
|
(CONFIG_CPU == S5L8700)) /* Samsung S5L8700: core, plugins, codecs */
|
|
#define ICODE_ATTR __attribute__ ((section(".icode")))
|
|
#define ICONST_ATTR __attribute__ ((section(".irodata")))
|
|
#define IDATA_ATTR __attribute__ ((section(".idata")))
|
|
#define IBSS_ATTR __attribute__ ((section(".ibss")))
|
|
#define USE_IRAM
|
|
#if CONFIG_CPU != SH7034
|
|
#define PLUGIN_USE_IRAM
|
|
#endif
|
|
#if defined(CPU_ARM)
|
|
/* GCC quirk workaround: arm-elf-gcc treats static functions as short_call
|
|
* when not compiling with -ffunction-sections, even when the function has
|
|
* a section attribute. */
|
|
#define STATICIRAM
|
|
#else
|
|
#define STATICIRAM static
|
|
#endif
|
|
#else
|
|
#define ICODE_ATTR
|
|
#define ICONST_ATTR
|
|
#define IDATA_ATTR
|
|
#define IBSS_ATTR
|
|
#define STATICIRAM static
|
|
#endif
|
|
|
|
#ifndef IRAM_LCDFRAMEBUFFER
|
|
/* if the LCD framebuffer has not been moved to IRAM, define it empty here */
|
|
#define IRAM_LCDFRAMEBUFFER
|
|
#endif
|
|
|
|
/* Change this if you want to build a single-core firmware for a multicore
|
|
* target for debugging */
|
|
#if defined(BOOTLOADER)
|
|
#define FORCE_SINGLE_CORE
|
|
#endif
|
|
|
|
/* Core locking types - specifies type of atomic operation */
|
|
#define CORELOCK_NONE 0
|
|
#define SW_CORELOCK 1 /* Mutual exclusion provided by a software algorithm
|
|
and not a special semaphore instruction */
|
|
#define CORELOCK_SWAP 2 /* A swap (exchange) instruction */
|
|
|
|
#if defined(CPU_PP)
|
|
#define IDLE_STACK_SIZE 0x80
|
|
#define IDLE_STACK_WORDS 0x20
|
|
|
|
/* Attributes to place data in uncached DRAM */
|
|
/* These are useful beyond dual-core and ultimately beyond PP since they may
|
|
* be used for DMA buffers and such without cache maintenence calls. */
|
|
#define NOCACHEBSS_ATTR __attribute__((section(".ncbss"),nocommon))
|
|
#define NOCACHEDATA_ATTR __attribute__((section(".ncdata"),nocommon))
|
|
|
|
#if !defined(FORCE_SINGLE_CORE)
|
|
|
|
#define NUM_CORES 2
|
|
#define CURRENT_CORE current_core()
|
|
/* Attributes for core-shared data in DRAM where IRAM is better used for other
|
|
* purposes. */
|
|
#define SHAREDBSS_ATTR NOCACHEBSS_ATTR
|
|
#define SHAREDDATA_ATTR NOCACHEDATA_ATTR
|
|
|
|
#define IF_COP(...) __VA_ARGS__
|
|
#define IF_COP_VOID(...) __VA_ARGS__
|
|
#define IF_COP_CORE(core) core
|
|
|
|
#ifdef CPU_PP
|
|
#define CONFIG_CORELOCK SW_CORELOCK /* SWP(B) is broken */
|
|
#else
|
|
#define CONFIG_CORELOCK CORELOCK_SWAP
|
|
#endif
|
|
|
|
#endif /* !defined(BOOTLOADER) && CONFIG_CPU != PP5002 */
|
|
|
|
#endif /* CPU_PP */
|
|
|
|
#ifndef CONFIG_CORELOCK
|
|
#define CONFIG_CORELOCK CORELOCK_NONE
|
|
#endif
|
|
|
|
#if CONFIG_CORELOCK == SW_CORELOCK
|
|
#define IF_SWCL(...) __VA_ARGS__
|
|
#define IFN_SWCL(...)
|
|
#else
|
|
#define IF_SWCL(...)
|
|
#define IFN_SWCL(...) __VA_ARGS__
|
|
#endif /* CONFIG_CORELOCK == */
|
|
|
|
#ifndef NUM_CORES
|
|
/* Default to single core */
|
|
#define NUM_CORES 1
|
|
#define CURRENT_CORE CPU
|
|
/* Attributes for core-shared data in DRAM - no caching considerations */
|
|
#define SHAREDBSS_ATTR
|
|
#define SHAREDDATA_ATTR
|
|
#ifndef NOCACHEBSS_ATTR
|
|
#define NOCACHEBSS_ATTR
|
|
#define NOCACHEDATA_ATTR
|
|
#endif
|
|
#define CONFIG_CORELOCK CORELOCK_NONE
|
|
|
|
#define IF_COP(...)
|
|
#define IF_COP_VOID(...) void
|
|
#define IF_COP_CORE(core) CURRENT_CORE
|
|
|
|
#endif /* NUM_CORES */
|
|
|
|
#ifdef HAVE_HEADPHONE_DETECTION
|
|
/* Timeout objects required if headphone detection is enabled */
|
|
#ifndef INCLUDE_TIMEOUT_API
|
|
#define INCLUDE_TIMEOUT_API
|
|
#endif
|
|
#endif /* HAVE_HEADPHONE_DETECTION */
|
|
|
|
#if defined(HAVE_USBSTACK) || (CONFIG_STORAGE & STORAGE_NAND)
|
|
#define STORAGE_GET_INFO
|
|
#endif
|
|
|
|
#ifdef CPU_MIPS
|
|
#include <stdbool.h> /* MIPS GCC fix? */
|
|
#endif
|
|
|
|
#endif /* __CONFIG_H__ */
|