e5d08722f8
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6763 a1c6a512-1295-4272-9138-f99709370657
269 lines
14 KiB
C
269 lines
14 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2004 by Linus Nielsen Feltzing
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __MCF5249_H__
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#define __MCF5249_H__
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#define MBAR 0x40000000
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#define MBAR2 0x80000000
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#define SYSTEM_CTRL (*(volatile unsigned char *)(MBAR + 0x000))
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#define BUSMASTER_CTRL (*(volatile unsigned char *)(MBAR + 0x00c))
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#define IPR (*(volatile unsigned long *)(MBAR + 0x040))
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#define IMR (*(volatile unsigned long *)(MBAR + 0x044))
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#define ICR0 (*(volatile unsigned long *)(MBAR + 0x04c))
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#define ICR4 (*(volatile unsigned long *)(MBAR + 0x050))
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#define ICR8 (*(volatile unsigned long *)(MBAR + 0x054))
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#define CSAR0 (*(volatile unsigned long *)(MBAR + 0x080))
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#define CSMR0 (*(volatile unsigned long *)(MBAR + 0x084))
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#define CSCR0 (*(volatile unsigned long *)(MBAR + 0x088))
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#define CSAR1 (*(volatile unsigned long *)(MBAR + 0x08c))
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#define CSMR1 (*(volatile unsigned long *)(MBAR + 0x090))
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#define CSCR1 (*(volatile unsigned long *)(MBAR + 0x094))
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#define CSAR2 (*(volatile unsigned long *)(MBAR + 0x098))
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#define CSMR2 (*(volatile unsigned long *)(MBAR + 0x09c))
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#define CSCR2 (*(volatile unsigned long *)(MBAR + 0x0a0))
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#define CSAR3 (*(volatile unsigned long *)(MBAR + 0x0a4))
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#define CSMR3 (*(volatile unsigned long *)(MBAR + 0x0a8))
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#define CSCR3 (*(volatile unsigned long *)(MBAR + 0x0ac))
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#define DCR (*(volatile unsigned short *)(MBAR + 0x100))
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#define DACR0 (*(volatile unsigned long *)(MBAR + 0x108))
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#define DMR0 (*(volatile unsigned long *)(MBAR + 0x10c))
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#define DACR1 (*(volatile unsigned long *)(MBAR + 0x110))
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#define DMR1 (*(volatile unsigned long *)(MBAR + 0x114))
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#define TMR0 (*(volatile unsigned short *)(MBAR + 0x140))
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#define TRR0 (*(volatile unsigned short *)(MBAR + 0x144))
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#define TCR0 (*(volatile unsigned short *)(MBAR + 0x148))
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#define TCN0 (*(volatile unsigned short *)(MBAR + 0x14c))
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#define TER0 (*(volatile unsigned short *)(MBAR + 0x150))
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#define TMR1 (*(volatile unsigned short *)(MBAR + 0x180))
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#define TRR1 (*(volatile unsigned short *)(MBAR + 0x184))
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#define TCR1 (*(volatile unsigned short *)(MBAR + 0x188))
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#define TCN1 (*(volatile unsigned short *)(MBAR + 0x18c))
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#define TER1 (*(volatile unsigned short *)(MBAR + 0x190))
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#define UMR10 (*(volatile unsigned char *)(MBAR + 0x1c0))
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#define UMR20 (*(volatile unsigned char *)(MBAR + 0x1c0))
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#define USR0 (*(volatile unsigned char *)(MBAR + 0x1c4))
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#define UCSR0 (*(volatile unsigned char *)(MBAR + 0x1c4))
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#define UCR0 (*(volatile unsigned char *)(MBAR + 0x1c8))
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#define URB0 (*(volatile unsigned char *)(MBAR + 0x1cc))
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#define UTB0 (*(volatile unsigned char *)(MBAR + 0x1cc))
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#define UIPCR0 (*(volatile unsigned char *)(MBAR + 0x1d0))
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#define UACR0 (*(volatile unsigned char *)(MBAR + 0x1d0))
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#define UISR0 (*(volatile unsigned char *)(MBAR + 0x1d4))
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#define UIMR0 (*(volatile unsigned char *)(MBAR + 0x1d4))
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#define UBG10 (*(volatile unsigned char *)(MBAR + 0x1d8))
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#define UBG20 (*(volatile unsigned char *)(MBAR + 0x1dc))
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#define UIVR0 (*(volatile unsigned char *)(MBAR + 0x1f0))
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#define UIP0 (*(volatile unsigned char *)(MBAR + 0x1f4))
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#define UOP10 (*(volatile unsigned char *)(MBAR + 0x1f8))
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#define UOP00 (*(volatile unsigned char *)(MBAR + 0x1fc))
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#define UMR11 (*(volatile unsigned char *)(MBAR + 0x200))
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#define UMR21 (*(volatile unsigned char *)(MBAR + 0x200))
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#define USR1 (*(volatile unsigned char *)(MBAR + 0x204))
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#define UCSR1 (*(volatile unsigned char *)(MBAR + 0x204))
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#define UCR1 (*(volatile unsigned char *)(MBAR + 0x208))
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#define URB1 (*(volatile unsigned char *)(MBAR + 0x20c))
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#define UTB1 (*(volatile unsigned char *)(MBAR + 0x20c))
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#define UIPCR1 (*(volatile unsigned char *)(MBAR + 0x210))
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#define UACR1 (*(volatile unsigned char *)(MBAR + 0x210))
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#define UISR1 (*(volatile unsigned char *)(MBAR + 0x214))
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#define UIMR1 (*(volatile unsigned char *)(MBAR + 0x214))
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#define UBG11 (*(volatile unsigned char *)(MBAR + 0x218))
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#define UBG21 (*(volatile unsigned char *)(MBAR + 0x21c))
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#define UIVR1 (*(volatile unsigned char *)(MBAR + 0x230))
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#define UIP1 (*(volatile unsigned char *)(MBAR + 0x234))
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#define UOP11 (*(volatile unsigned char *)(MBAR + 0x238))
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#define UOP01 (*(volatile unsigned char *)(MBAR + 0x23c))
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#define MADR (*(volatile unsigned char *)(MBAR + 0x280))
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#define MFDR (*(volatile unsigned char *)(MBAR + 0x284))
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#define MBCR (*(volatile unsigned char *)(MBAR + 0x288))
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#define MBSR (*(volatile unsigned char *)(MBAR + 0x28c))
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#define MBDR (*(volatile unsigned char *)(MBAR + 0x290))
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#define SAR0 (*(volatile unsigned long *)(MBAR + 0x300))
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#define DAR0 (*(volatile unsigned long *)(MBAR + 0x304))
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#define DCR0 (*(volatile unsigned long *)(MBAR + 0x308))
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#define BCR0 (*(volatile unsigned long *)(MBAR + 0x30c))
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#define DSR0 (*(volatile unsigned char *)(MBAR + 0x310))
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#define DIVR0 (*(volatile unsigned char *)(MBAR + 0x314))
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#define SAR1 (*(volatile unsigned long *)(MBAR + 0x340))
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#define DAR1 (*(volatile unsigned long *)(MBAR + 0x344))
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#define DCR1 (*(volatile unsigned long *)(MBAR + 0x348))
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#define BCR1 (*(volatile unsigned long *)(MBAR + 0x34c))
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#define DSR1 (*(volatile unsigned char *)(MBAR + 0x350))
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#define DIVR1 (*(volatile unsigned char *)(MBAR + 0x354))
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#define SAR2 (*(volatile unsigned long *)(MBAR + 0x380))
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#define DAR2 (*(volatile unsigned long *)(MBAR + 0x384))
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#define DCR2 (*(volatile unsigned long *)(MBAR + 0x388))
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#define BCR2 (*(volatile unsigned long *)(MBAR + 0x38c))
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#define DSR2 (*(volatile unsigned char *)(MBAR + 0x390))
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#define DIVR2 (*(volatile unsigned char *)(MBAR + 0x394))
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#define SAR3 (*(volatile unsigned long *)(MBAR + 0x3c0))
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#define DAR3 (*(volatile unsigned long *)(MBAR + 0x3c4))
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#define DCR3 (*(volatile unsigned long *)(MBAR + 0x3c8))
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#define BCR3 (*(volatile unsigned long *)(MBAR + 0x3cc))
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#define DSR3 (*(volatile unsigned char *)(MBAR + 0x3d0))
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#define DIVR3 (*(volatile unsigned char *)(MBAR + 0x3d4))
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#define QSPIMR (*(volatile unsigned short *)(MBAR + 0x400))
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#define QSPIQDLYR (*(volatile unsigned short *)(MBAR + 0x404))
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#define QSPIQWR (*(volatile unsigned short *)(MBAR + 0x408))
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#define QSPIQIR (*(volatile unsigned short *)(MBAR + 0x40c))
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#define QSPIQAR (*(volatile unsigned short *)(MBAR + 0x410))
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#define QIR (*(volatile unsigned short *)(MBAR + 0x414))
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#define GPIO_READ (*(volatile unsigned long *)(MBAR2 + 0x000))
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#define GPIO_OUT (*(volatile unsigned long *)(MBAR2 + 0x004))
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#define GPIO_ENABLE (*(volatile unsigned long *)(MBAR2 + 0x008))
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#define GPIO_FUNCTION (*(volatile unsigned long *)(MBAR2 + 0x00c))
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#define IIS1CONFIG (*(volatile unsigned long *)(MBAR2 + 0x010))
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#define IIS2CONFIG (*(volatile unsigned long *)(MBAR2 + 0x014))
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#define IIS3CONFIG (*(volatile unsigned long *)(MBAR2 + 0x018))
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#define IIS4CONFIG (*(volatile unsigned long *)(MBAR2 + 0x01c))
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#define EBU1CONFIG (*(volatile unsigned long *)(MBAR2 + 0x020))
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#define EBU1RCVCCHANNEL1 (*(volatile unsigned long *)(MBAR2 + 0x024))
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#define EBUTXCCHANNEL1 (*(volatile unsigned long *)(MBAR2 + 0x028))
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#define EBUTXCCHANNEL2 (*(volatile unsigned long *)(MBAR2 + 0x02c))
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#define DATAINCONTROL (*(volatile unsigned long *)(MBAR2 + 0x030))
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#define PDIR1_L (*(volatile unsigned long *)(MBAR2 + 0x034))
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#define PDIR3_L (*(volatile unsigned long *)(MBAR2 + 0x044))
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#define PDIR1_R (*(volatile unsigned long *)(MBAR2 + 0x054))
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#define PDIR3_R (*(volatile unsigned long *)(MBAR2 + 0x064))
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#define PDOR1_L (*(volatile unsigned long *)(MBAR2 + 0x034))
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#define PDOR1_R (*(volatile unsigned long *)(MBAR2 + 0x044))
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#define PDOR2_L (*(volatile unsigned long *)(MBAR2 + 0x054))
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#define PDOR2_R (*(volatile unsigned long *)(MBAR2 + 0x064))
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#define PDIR2 (*(volatile unsigned long *)(MBAR2 + 0x074))
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#define PDOR3 (*(volatile unsigned long *)(MBAR2 + 0x074))
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#define UCHANNELTRANSMIT (*(volatile unsigned long *)(MBAR2 + 0x084))
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#define U1CHANNELRECEIVE (*(volatile unsigned long *)(MBAR2 + 0x088))
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#define Q1CHANNELRECEIVE (*(volatile unsigned long *)(MBAR2 + 0x08c))
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#define CD_TEXT_CONTROL (*(volatile unsigned char *)(MBAR2 + 0x092))
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#define INTERRUPTEN (*(volatile unsigned long *)(MBAR2 + 0x094))
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#define INTERRUPTCLEAR (*(volatile unsigned long *)(MBAR2 + 0x098))
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#define INTERRUPTSTAT (*(volatile unsigned long *)(MBAR2 + 0x098))
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#define DMACONFIG (*(volatile unsigned char *)(MBAR2 + 0x09f))
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#define PHASECONFIG (*(volatile unsigned char *)(MBAR2 + 0x0a3))
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#define XTRIM (*(volatile unsigned short *)(MBAR2 + 0x0a6))
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#define FREQMEAS (*(volatile unsigned long *)(MBAR2 + 0x0a8))
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#define BLOCKCONTROL (*(volatile unsigned short *)(MBAR2 + 0x0ca))
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#define AUDIOGLOB (*(volatile unsigned short *)(MBAR2 + 0x0ce))
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#define EBU2CONFIG (*(volatile unsigned long *)(MBAR2 + 0x0d0))
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#define EBU2RCVCCHANNEL1 (*(volatile unsigned short *)(MBAR2 + 0x0d4))
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#define U2CHANNELRECEIVE (*(volatile unsigned long *)(MBAR2 + 0x0d8))
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#define Q2CHANNELRECEIVE (*(volatile unsigned long *)(MBAR2 + 0x0dc))
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#define GPIO1_READ (*(volatile unsigned long *)(MBAR2 + 0x0b0))
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#define GPIO1_OUT (*(volatile unsigned long *)(MBAR2 + 0x0b4))
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#define GPIO1_ENABLE (*(volatile unsigned long *)(MBAR2 + 0x0b8))
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#define GPIO1_FUNCTION (*(volatile unsigned long *)(MBAR2 + 0x0bc))
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#define GPIO_INT_STAT (*(volatile unsigned long *)(MBAR2 + 0x0c0))
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#define GPIO_INT_CLEAR (*(volatile unsigned long *)(MBAR2 + 0x0c0))
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#define GPIO_INT_EN (*(volatile unsigned long *)(MBAR2 + 0x0c4))
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#define INTERRUPTSTAT3 (*(volatile unsigned long *)(MBAR2 + 0x0e0))
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#define INTERRUPTCLEAR3 (*(volatile unsigned long *)(MBAR2 + 0x0e0))
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#define INTERRUPTEN3 (*(volatile unsigned long *)(MBAR2 + 0x0e4))
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#define INTPRI1 (*(volatile unsigned long *)(MBAR2 + 0x140))
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#define INTPRI2 (*(volatile unsigned long *)(MBAR2 + 0x144))
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#define INTPRI3 (*(volatile unsigned long *)(MBAR2 + 0x148))
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#define INTPRI4 (*(volatile unsigned long *)(MBAR2 + 0x14c))
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#define INTPRI5 (*(volatile unsigned long *)(MBAR2 + 0x150))
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#define INTPRI6 (*(volatile unsigned long *)(MBAR2 + 0x154))
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#define INTPRI7 (*(volatile unsigned long *)(MBAR2 + 0x158))
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#define INTPRI8 (*(volatile unsigned long *)(MBAR2 + 0x15c))
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#define SPURVEC (*(volatile unsigned char *)(MBAR2 + 0x167))
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#define INTBASE (*(volatile unsigned char *)(MBAR2 + 0x16b))
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#define PLLCR (*(volatile unsigned long *)(MBAR2 + 0x180))
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#define DMAROUTE (*(volatile unsigned long *)(MBAR2 + 0x188))
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#define IDECONFIG1 (*(volatile unsigned long *)(MBAR2 + 0x18c))
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#define IDECONFIG2 (*(volatile unsigned long *)(MBAR2 + 0x190))
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#define IPERRORADR (*(volatile unsigned long *)(MBAR2 + 0x194))
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#define EXTRAINT (*(volatile unsigned long *)(MBAR2 + 0x198))
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#define ADCONFIG (*(volatile unsigned short *)(MBAR2 + 0x402))
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#define ADVALUE (*(volatile unsigned short *)(MBAR2 + 0x406))
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#define MADR2 (*(volatile unsigned char *)(MBAR2 + 0x440))
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#define MFDR2 (*(volatile unsigned char *)(MBAR2 + 0x444))
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#define MBCR2 (*(volatile unsigned char *)(MBAR2 + 0x448))
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#define MBSR2 (*(volatile unsigned char *)(MBAR2 + 0x44c))
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#define MBDR2 (*(volatile unsigned char *)(MBAR2 + 0x450))
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#define FLASHMEDIACONFIG (*(volatile unsigned long *)(MBAR2 + 0x460))
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#define FLASHMEDIACMD1 (*(volatile unsigned long *)(MBAR2 + 0x464))
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#define FLASHMEDIACMD2 (*(volatile unsigned long *)(MBAR2 + 0x468))
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#define FLASHMEDIADATA1 (*(volatile unsigned long *)(MBAR2 + 0x46c))
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#define FLASHMEDIADATA2 (*(volatile unsigned long *)(MBAR2 + 0x470))
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#define FLASHMEDIASTATUS (*(volatile unsigned long *)(MBAR2 + 0x474))
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#define FLASHMEDIAINTEN (*(volatile unsigned long *)(MBAR2 + 0x478))
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#define FLASHMEDIAINTSTAT (*(volatile unsigned long *)(MBAR2 + 0x47c))
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#define FLASHMEDIAINTCLEAR (*(volatile unsigned long *)(MBAR2 + 0x47c))
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#define DEVICE_ID (*(volatile unsigned long *)(MBAR2 + 0x0ac))
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/* DMA Registers ... */
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#define O_SAR 0x00 /* Source Address */
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#define O_DAR 0x04 /* Destination Address */
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#define O_DCR 0x08 /* DMA Control Register */
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#define O_BCR 0x0C /* 16 or 24 bits depending on BCR24BIT */
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#define O_DSR 0x10 /* DMA Status Register */
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#define O_IVR 0x14 /* Interrupt Vector Register */
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/* DMA Control Register bits */
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#define DMA_INT (1 << 31) /* Enable Interrupts */
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#define DMA_EEXT (1 << 30) /* Enable peripherial request */
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#define DMA_CS (1 << 29) /* Cycle Steal */
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#define DMA_AA (1 << 28) /* Auto-Align */
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#define DMA_SINC (1 << 22) /* Source Increment */
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#define DMA_SSIZE(x) (((x)&3) << 20) /* Size of source data */
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#define DMA_DINC (1 << 19) /* Destination Increment */
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#define DMA_DSIZE(x) (((x)&3) << 17) /* Size of destination data */
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#define DMA_START (1 << 16) /* Start DMA transfer */
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#define DMA_SIZE_DWORD 0 /* 4 bytes */
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#define DMA_SIZE_BYTE 1 /* 1 byte */
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#define DMA_SIZE_WORD 2 /* 2 bytes */
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#define DMA_SIZE_LINE 3 /* 16 bytes */
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/* DMA Status Register bits */
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#define DMA_CE (1 << 6) /* Configuration Error */
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#define DMA_BES (1 << 5) /* Bus error on source */
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#define DMA_BED (1 << 4) /* Bus error on destination */
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#define DMA_REQ (1 << 2) /* Request pending */
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#define DMA_BSY (1 << 1) /* DMA channel busy */
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#define DMA_DONE (1 << 0) /* Transfer has completed */
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/* DMAROUTE config */
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#define DMA0_REQ_AUDIO_1 0x80
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#define DMA0_REQ_AUDIO_2 0x81
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#define DMA1_REQ_AUDIO_1 0x8000
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#define DMA1_REQ_AUDIO_2 0x8100
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#endif
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