195ef597f5
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14492 a1c6a512-1295-4272-9138-f99709370657
173 lines
6.6 KiB
C
173 lines
6.6 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 by Christian Gmeiner
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*
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* Based on code from the Linux Target Image Builder from Freescale
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* available at http://www.bitshrine.org/ and
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* http://www.bitshrine.org/gpp/linux-2.6.16-mx31-usb-2.patch
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* Adapted for Rockbox in January 2007
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* Original file: drivers/usb/gadget/arcotg_udc.c
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*
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* USB Device Controller Driver
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* Driver for ARC OTG USB module in the i.MX31 platform, etc.
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*
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* Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* Based on mpc-udc.h
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* Author: Li Yang (leoli@freescale.com)
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* Jiang Bo (Tanya.jiang@freescale.com)
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef _ARCOTG_DCD_H_
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#define _ARCOTG_DCD_H_
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#include "usbstack/core.h"
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#include "arcotg_udc.h"
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/*-------------------------------------------------------------------------*/
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#define ep_is_in(EP) (((EP)->desc->bEndpointAddress & USB_DIR_IN)==USB_DIR_IN)
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#define EP_DIR_IN 1
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#define EP_DIR_OUT 0
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/*-------------------------------------------------------------------------*/
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/* pipe direction macro from device view */
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#define USB_RECV (0) /* OUT EP */
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#define USB_SEND (1) /* IN EP */
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/* Shared Bit Masks for Endpoint Queue Head and Endpoint Transfer Descriptor */
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#define TERMINATE (1 << 0)
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#define STATUS_ACTIVE (1 << 7)
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#define STATUS_HALTED (1 << 6)
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#define STATUS_DATA_BUFF_ERR (1 << 5)
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#define STATUS_TRANSACTION_ERR (1 << 4)
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#define INTERRUPT_ON_COMPLETE (1 << 15)
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#define LENGTH_BIT_POS (16)
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#define ADDRESS_MASK (0xFFFFFFE0)
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#define ERROR_MASK (DTD_STATUS_HALTED | \
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DTD_STATUS_DATA_BUFF_ERR | \
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DTD_STATUS_TRANSACTION_ERR)
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#define RESERVED_FIELDS ((1 << 0) | (1 << 2) | (1 << 4) | \
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(1 << 8) | (1 << 9) | (1 << 12)| \
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(1 << 13)| (1 << 14)| (1 << 31))
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/* Endpoint Queue Head Bit Masks */
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#define EP_QUEUE_HEAD_MULT_POS (30)
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#define EP_QUEUE_HEAD_ZLT_SEL (0x20000000)
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#define EP_QUEUE_HEAD_MAX_PKT_LEN(ep_info) (((ep_info)>>16)&0x07ff)
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#define EP_QUEUE_HEAD_MULTO (0x00000C00)
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#define EP_QUEUE_CURRENT_OFFSET_MASK (0x00000FFF)
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#define EP_QUEUE_FRINDEX_MASK (0x000007FF)
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#define EP_MAX_LENGTH_TRANSFER (0x4000)
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/*-------------------------------------------------------------------------*/
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/* ep name is important, it should obey the convention of ep_match() */
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/* even numbered EPs are OUT or setup, odd are IN/INTERRUPT */
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static const char* ep_name[] = {
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"ep0-control", NULL, /* everyone has ep0 */
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/* 7 configurable endpoints */
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"ep1out",
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"ep1in",
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"ep2out",
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"ep2in",
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"ep3out",
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"ep3in",
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"ep4out",
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"ep4in",
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"ep5out",
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"ep5in",
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"ep6out",
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"ep6in",
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"ep7out",
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"ep7in"
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};
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/*-------------------------------------------------------------------------*/
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/* Endpoint Transfer Descriptor data struct */
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struct dtd {
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uint32_t next_dtd; /* Next TD pointer(31-5), T(0) set indicate invalid */
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uint32_t dtd_token; /* Total bytes (30-16), IOC (15), MultO(11-10), STS (7-0) */
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uint32_t buf_ptr0; /* Buffer pointer Page 0 */
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uint32_t buf_ptr1; /* Buffer pointer Page 1 */
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uint32_t buf_ptr2; /* Buffer pointer Page 2 */
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uint32_t buf_ptr3; /* Buffer pointer Page 3 */
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uint32_t buf_ptr4; /* Buffer pointer Page 4 */
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uint32_t res; /* make it an even 8 words */
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} __attribute((packed));
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/* Endpoint Queue Head*/
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struct dqh {
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uint32_t endpt_cap; /* Mult(31-30) , Zlt(29) , Max Pkt len
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* and IOS(15) */
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uint32_t cur_dtd; /* Current dTD Pointer(31-5) */
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struct dtd dtd_ovrl; /* Transfer descriptor */
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uint32_t setup_buffer[2]; /* Setup data 8 bytes */
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uint32_t res2[4]; /* pad out to 64 bytes */
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} __attribute((packed));
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#define RESPONSE_SIZE 30
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/* our controller struct */
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struct arcotg_dcd {
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struct usb_ctrlrequest local_setup_buff;
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struct usb_ep endpoints[USB_MAX_PIPES];
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struct usb_response response[RESPONSE_SIZE];
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enum usb_device_state usb_state;
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enum usb_device_state resume_state;
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bool stopped;
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};
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/*-------------------------------------------------------------------------*/
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/* usb_controller functions */
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void usb_arcotg_dcd_init(void);
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void usb_arcotg_dcd_shutdown(void);
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void usb_arcotg_dcd_irq(void);
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void usb_arcotg_dcd_start(void);
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void usb_arcotg_dcd_stop(void);
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/* usb controller ops */
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int usb_arcotg_dcd_enable(struct usb_ep* ep, struct usb_endpoint_descriptor* desc);
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int usb_arcotg_dcd_disable(struct usb_ep* ep);
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int usb_arcotg_dcd_set_halt(struct usb_ep* ep, bool halt);
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int usb_arcotg_dcd_send(struct usb_ep* ep, struct usb_response* request);
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int usb_arcotg_dcd_receive(struct usb_ep* ep, struct usb_response* res);
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/* interrupt handlers */
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static void setup_received_int(struct usb_ctrlrequest* request);
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static void port_change_int(void);
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static void reset_int(void);
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static void suspend_int(void);
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static void resume_int(void);
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/* life cycle */
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static void qh_init(unsigned char ep_num, unsigned char dir, unsigned char ep_type,
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unsigned int max_pkt_len, unsigned int zlt, unsigned char mult);
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static void td_init(struct dtd* td, void* buffer, uint32_t todo);
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static void ep_setup(unsigned char ep_num, unsigned char dir, unsigned char ep_type);
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/* helpers for tx/rx */
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static int td_enqueue(struct dtd* td, struct dqh* qh, unsigned int mask);
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static int td_wait(struct dtd* td, unsigned int mask);
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static int usb_ack(struct usb_ctrlrequest * s, int error);
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#endif /*_ARCOTG_DCD_H_*/
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