45c7498f59
We can't pop into pc on ARMv4t when using thumb: the T bit won't be modified if we are returning to a thumb function Code running on ARMv4t should use the new ldrpc / ldmpc macros instead of ldr pc, [sp], #4 and ldm(cond) sp!, {regs, pc} No modification on pure ARM builds and ARMv5+ Note: USE_THUMB is currently never defined, no targets can currently be built with -mthumb, see FS#6734 git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26756 a1c6a512-1295-4272-9138-f99709370657
82 lines
2.5 KiB
ArmAsm
82 lines
2.5 KiB
ArmAsm
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006 by Thom Johansen
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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.section .icode,"ax",%progbits
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.align 2
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/* The following code is based on code from the Linux kernel version 2.6.15.3,
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* linux/arch/arm/lib/memset.S
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*
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* Copyright (C) 1995-2000 Russell King
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*/
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.global memset16
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.type memset16,%function
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memset16:
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tst r0, #2 @ unaligned?
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cmpne r2, #0
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strneh r1, [r0], #2 @ store one halfword to align
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subne r2, r2, #1
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/*
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* we know that the pointer in r0 is aligned to a word boundary.
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*/
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orr r1, r1, r1, lsl #16
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mov r3, r1
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cmp r2, #8
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blt 4f
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/*
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* We need an extra register for this loop - save the return address and
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* use the LR
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*/
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str lr, [sp, #-4]!
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mov ip, r1
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mov lr, r1
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2: subs r2, r2, #32
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stmgeia r0!, {r1, r3, ip, lr} @ 64 bytes at a time.
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stmgeia r0!, {r1, r3, ip, lr}
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stmgeia r0!, {r1, r3, ip, lr}
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stmgeia r0!, {r1, r3, ip, lr}
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bgt 2b
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ldrpc cond=eq @ Now <64 bytes to go.
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/*
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* No need to correct the count; we're only testing bits from now on
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*/
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tst r2, #16
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stmneia r0!, {r1, r3, ip, lr}
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stmneia r0!, {r1, r3, ip, lr}
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tst r2, #8
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stmneia r0!, {r1, r3, ip, lr}
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ldr lr, [sp], #4
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4: tst r2, #4
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stmneia r0!, {r1, r3}
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tst r2, #2
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strne r1, [r0], #4
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tst r2, #1
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strneh r1, [r0], #2
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bx lr
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.end:
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.size memset16,.end-memset16
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