Michael Sevakis 1aaa89aa9b Wow. Fix those irq #defines for ARM and use the right one in power-c200_e200.c. How'd that happen? ... git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17010 a1c6a512-1295-4272-9138-f99709370657		2008-04-07 01:13:44 +00:00
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sansa-c200	Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with shared variables in DRAM (it seems swp(b) is at least partially broken on all PP or I'm doing something very wrong here :\). For core-shared data use SHAREDBSS/DATA_ATTR. NOCACHEBSS/DATA_ATTR is available whether or not single core is forced for static peripheral-DMA buffer allocation without use of the UNCACHED_ADDR macro in code and is likely useful on a non-PP target with a data cache (although not actually enabled in config.h and the .lds's in this commit).	2008-04-06 04:34:57 +00:00
sansa-e200	e200: Get the UNCACHED_ADDR macro and phys_fb_address use out of the lcd driver.	2008-04-06 05:08:39 +00:00
adc-c200_e200.c	Portal player i2c driver: More struct spinlock phaseout.	2007-11-12 07:58:54 +00:00
adc-target.h	Move files that will be common to the Sansa e200 and c200	2007-09-06 03:01:41 +00:00
app.lds	Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with shared variables in DRAM (it seems swp(b) is at least partially broken on all PP or I'm doing something very wrong here :\). For core-shared data use SHAREDBSS/DATA_ATTR. NOCACHEBSS/DATA_ATTR is available whether or not single core is forced for static peripheral-DMA buffer allocation without use of the UNCACHED_ADDR macro in code and is likely useful on a non-PP target with a data cache (although not actually enabled in config.h and the .lds's in this commit).	2008-04-06 04:34:57 +00:00
ata-c200_e200.c	Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with shared variables in DRAM (it seems swp(b) is at least partially broken on all PP or I'm doing something very wrong here :\). For core-shared data use SHAREDBSS/DATA_ATTR. NOCACHEBSS/DATA_ATTR is available whether or not single core is forced for static peripheral-DMA buffer allocation without use of the UNCACHED_ADDR macro in code and is likely useful on a non-PP target with a data cache (although not actually enabled in config.h and the .lds's in this commit).	2008-04-06 04:34:57 +00:00
ata-target.h	Move files that will be common to the Sansa e200 and c200	2007-09-06 03:01:41 +00:00
audio-c200_e200.c	Move files that will be common to the Sansa e200 and c200	2007-09-06 03:01:41 +00:00
backlight-c200_e200.c	Fix bootloaders, and the backlight-modded Ondio build.	2007-11-12 19:19:38 +00:00
backlight-target.h	Hardware controlled backlight brightness for iPod Video and Nano, retaining the software PWM fade in/ fade out. * Backlight handling cleanup, getting rid of one layer of 'lowlevelness'. * Use atomic GPIO bit manipulation for PP502x backlight handling.	2007-11-12 18:49:53 +00:00
boot.lds	Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with shared variables in DRAM (it seems swp(b) is at least partially broken on all PP or I'm doing something very wrong here :\). For core-shared data use SHAREDBSS/DATA_ATTR. NOCACHEBSS/DATA_ATTR is available whether or not single core is forced for static peripheral-DMA buffer allocation without use of the UNCACHED_ADDR macro in code and is likely useful on a non-PP target with a data cache (although not actually enabled in config.h and the .lds's in this commit).	2008-04-06 04:34:57 +00:00
hotswap-target.h	Hotswap code shuffling: Fix yellow. Simplify some target function access. Keep fat lock access from compiling for Ondios - think of a nicer way later.	2008-03-12 11:08:41 +00:00
power-c200_e200.c	Wow. Fix those irq #defines for ARM and use the right one in power-c200_e200.c. How'd that happen?	2008-04-07 01:13:44 +00:00