c2ca8c710c
* Make the main binary compile. To send a firmware file, use mtp-sendfile. To update you'll need to delete the previous firmware file, as files are named sequentially and the first one is loaded. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15836 a1c6a512-1295-4272-9138-f99709370657
448 lines
8.9 KiB
Text
448 lines
8.9 KiB
Text
#include "config.h"
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ENTRY(start)
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#ifdef CPU_COLDFIRE
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OUTPUT_FORMAT(elf32-m68k)
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INPUT(target/coldfire/crt0.o)
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#elif defined(CPU_ARM)
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OUTPUT_FORMAT(elf32-littlearm)
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OUTPUT_ARCH(arm)
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#ifdef CPU_PP
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INPUT(target/arm/crt0-pp.o)
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#elif CONFIG_CPU==DM320
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INPUT(target/arm/tms320dm320/crt0.o)
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#elif CONFIG_CPU==S3C2440
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INPUT(target/arm/s3c2440/crt0.o)
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#elif CONFIG_CPU == PNX0101
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INPUT(target/arm/pnx0101/crt0-pnx0101.o)
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#elif defined(CPU_ARM)
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INPUT(target/arm/crt0.o)
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#endif
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#else
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OUTPUT_FORMAT(elf32-sh)
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INPUT(target/sh/crt0.o)
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#endif
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#define PLUGINSIZE PLUGIN_BUFFER_SIZE
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#define CODECSIZE CODEC_SIZE
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#ifdef DEBUG
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#define STUBOFFSET 0x10000
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#else
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#define STUBOFFSET 0
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#endif
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#if CONFIG_CPU==S3C2440
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#include "s3c2440.h"
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#define DRAMSIZE (MEMORYSIZE * 0x100000) - 0x100 - PLUGINSIZE - STUBOFFSET - CODECSIZE - LCD_BUFFER_SIZE - TTB_SIZE
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#elif CONFIG_CPU==DM320
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#include "dm320.h"
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#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE - LCD_BUFFER_SIZE - TTB_SIZE
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#else
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#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE
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#endif
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#if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300)
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#define DRAMORIG 0x31000000 + STUBOFFSET
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#define IRAMORIG 0x10000000
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#define IRAMSIZE 0xc000
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#elif defined(IAUDIO_X5) || defined(IAUDIO_M5)
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#define DRAMORIG 0x31000000 + STUBOFFSET
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#define IRAMORIG 0x10000000
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#define IRAMSIZE 0x10000
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#elif defined(CPU_PP)
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#define DRAMORIG 0x00000000 + STUBOFFSET
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#define IRAMORIG 0x40000000
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#define IRAMSIZE 0xc000
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#elif CONFIG_CPU==PNX0101
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#define DRAMORIG 0xc00000 + STUBOFFSET
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#define IRAM0ORIG 0x000000
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#define IRAM0SIZE 0x7000
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#define IRAMORIG 0x400000
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#define IRAMSIZE 0x7000
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#elif CONFIG_CPU==S3C2440
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#define DRAMORIG 0x00000100 + STUBOFFSET
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#define IRAMORIG DRAMORIG
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#define IRAM DRAM
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#define IRAMSIZE 0x1000
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#elif CONFIG_CPU==DM320
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#define DRAMORIG 0x00900000 + STUBOFFSET
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#define IRAMORIG 0x00000000
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#define IRAMSIZE 0x4000
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#elif CONFIG_CPU==IMX31L
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#define DRAMORIG (0x88000000 + STUBOFFSET)
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#define IRAMORIG 0x1FFFC000
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#define IRAMSIZE 0x4000
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#else
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#define DRAMORIG 0x09000000 + STUBOFFSET
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#define IRAMORIG 0x0f000000
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#define IRAMSIZE 0x1000
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#endif
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/* End of the audio buffer, where the codec buffer starts */
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#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE)
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/* Where the codec buffer ends, and the plugin buffer starts */
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#define ENDADDR (ENDAUDIOADDR + CODECSIZE)
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MEMORY
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{
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DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
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#if CONFIG_CPU != S3C2440
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IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
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#endif
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#if CONFIG_CPU==PNX0101
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IRAM0 : ORIGIN = IRAM0ORIG, LENGTH = IRAM0SIZE
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#endif
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}
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SECTIONS
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{
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#if (CONFIG_CPU==DM320)
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.text :
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{
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loadaddress = .;
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_loadaddress = .;
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. = ALIGN(0x200);
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*(.init.text)
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*(.text*)
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*(.glue_7)
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*(.glue_7t)
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. = ALIGN(0x4);
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} > DRAM
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.rodata :
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{
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*(.rodata) /* problems without this, dunno why */
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*(.rodata*)
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*(.rodata.str1.1)
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*(.rodata.str1.4)
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. = ALIGN(0x4);
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/* Pseudo-allocate the copies of the data sections */
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_datacopy = .;
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} > DRAM
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/* TRICK ALERT! For RAM execution, we put the .data section at the
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same load address as the copy. Thus, we don't waste extra RAM
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when we don't actually need the copy. */
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.data : AT ( _datacopy )
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{
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_datastart = .;
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*(.data*)
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. = ALIGN(0x4);
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_dataend = .;
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} > DRAM
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/DISCARD/ :
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{
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*(.eh_frame)
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}
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.vectors IRAMORIG :
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{
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_vectorsstart = .;
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*(.vectors);
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_vectorsend = .;
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} > IRAM AT> DRAM
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_vectorscopy = LOADADDR(.vectors);
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.iram :
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{
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_iramstart = .;
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*(.icode)
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*(.irodata)
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*(.idata)
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_iramend = .;
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} > IRAM AT> DRAM
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_iramcopy = LOADADDR(.iram);
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.ibss (NOLOAD) :
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{
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_iedata = .;
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*(.ibss)
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. = ALIGN(0x4);
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_iend = .;
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} > IRAM
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.stack :
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{
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*(.stack)
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stackbegin = .;
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. += 0x2000;
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stackend = .;
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} > IRAM
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.bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors):
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{
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_edata = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(0x4);
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_end = .;
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} > DRAM
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#elif CONFIG_CPU==S3C2440
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.text :
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{
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loadaddress = .;
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_loadaddress = .;
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. = ALIGN(0x200);
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*(.init.text)
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*(.text*)
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*(.glue_7)
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*(.glue_7t)
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. = ALIGN(0x4);
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} > DRAM
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.rodata :
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{
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*(.rodata) /* problems without this, dunno why */
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*(.rodata*)
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*(.rodata.str1.1)
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*(.rodata.str1.4)
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. = ALIGN(0x4);
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/* Pseudo-allocate the copies of the data sections */
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_datacopy = .;
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} > DRAM
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/* TRICK ALERT! For RAM execution, we put the .data section at the
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same load address as the copy. Thus, we don't waste extra RAM
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when we don't actually need the copy. */
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.data : AT ( _datacopy )
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{
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_datastart = .;
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*(.data*)
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. = ALIGN(0x4);
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_dataend = .;
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} > DRAM
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/DISCARD/ :
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{
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*(.eh_frame)
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}
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.vectors 0x0 :
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{
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_vectorsstart = .;
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*(.vectors);
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_vectorsend = .;
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} AT> DRAM
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_vectorscopy = LOADADDR(.vectors);
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.iram :
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{
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_iramstart = .;
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*(.icode)
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*(.irodata)
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*(.idata)
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_iramend = .;
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} > DRAM
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_iramcopy = LOADADDR(.iram);
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.ibss (NOLOAD) :
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{
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_iedata = .;
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*(.ibss)
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. = ALIGN(0x4);
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_iend = .;
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} > DRAM
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.stack :
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{
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*(.stack)
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stackbegin = .;
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. += 0x2000;
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stackend = .;
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} > DRAM
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.bss :
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{
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_edata = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(0x4);
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_end = .;
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} > DRAM
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#else /* End CONFIG_CPU */
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#if !defined(CPU_ARM)
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.vectors :
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{
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loadaddress = .;
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_loadaddress = .;
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KEEP(*(.resetvectors));
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*(.resetvectors);
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KEEP(*(.vectors));
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*(.vectors);
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} > DRAM
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.text :
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{
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#else
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.text :
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{
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loadaddress = .;
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_loadaddress = .;
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#endif
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. = ALIGN(0x200);
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*(.init.text)
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*(.text*)
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#ifdef CPU_ARM
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*(.glue_7)
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*(.glue_7t)
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#endif
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. = ALIGN(0x4);
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} > DRAM
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.rodata :
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{
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*(.rodata) /* problems without this, dunno why */
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*(.rodata*)
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*(.rodata.str1.1)
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*(.rodata.str1.4)
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. = ALIGN(0x4);
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/* Pseudo-allocate the copies of the data sections */
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_datacopy = .;
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} > DRAM
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/* TRICK ALERT! For RAM execution, we put the .data section at the
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same load address as the copy. Thus, we don't waste extra RAM
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when we don't actually need the copy. */
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.data : AT ( _datacopy )
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{
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_datastart = .;
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*(.data*)
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. = ALIGN(0x4);
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_dataend = .;
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} > DRAM
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/DISCARD/ :
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{
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*(.eh_frame)
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}
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#if defined(CPU_ARM)
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.vectors 0x0 :
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{
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_vectorsstart = .;
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*(.vectors);
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_vectorsend = .;
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#if CONFIG_CPU==PNX0101
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*(.dmabuf)
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} >IRAM0 AT> DRAM
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#else
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} AT> DRAM
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#endif
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_vectorscopy = LOADADDR(.vectors);
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#endif
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#if CONFIG_CPU==PNX0101
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.iram IRAMORIG + SIZEOF(.vectors) :
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#else
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.iram IRAMORIG :
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#endif
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{
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_iramstart = .;
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*(.icode)
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*(.irodata)
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*(.idata)
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_iramend = .;
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} > IRAM AT> DRAM
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_iramcopy = LOADADDR(.iram);
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.ibss (NOLOAD) :
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{
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_iedata = .;
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*(.ibss)
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. = ALIGN(0x4);
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_iend = .;
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} > IRAM
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#if defined(CPU_COLDFIRE) || defined(CPU_ARM)
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#ifdef CPU_PP
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.idle_stacks :
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{
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*(.idle_stacks)
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#if NUM_CORES > 1
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cpu_idlestackbegin = .;
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. += IDLE_STACK_SIZE;
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cpu_idlestackend = .;
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#endif
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cop_idlestackbegin = .;
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. += IDLE_STACK_SIZE;
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cop_idlestackend = .;
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} > IRAM
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#endif
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.stack :
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{
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*(.stack)
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stackbegin = .;
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. += 0x2000;
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stackend = .;
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} > IRAM
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#else
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/* TRICK ALERT! We want 0x2000 bytes of stack, but we set the section
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size smaller, and allow the stack to grow into the .iram copy */
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.stack ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram):
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{
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*(.stack)
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_stackbegin = . - SIZEOF(.iram);
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. += 0x2000 - SIZEOF(.iram);
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_stackend = .;
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} > DRAM
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#endif
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#if defined(CPU_COLDFIRE)
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.bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram):
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#elif defined(CPU_ARM)
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.bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors):
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#else
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.bss :
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#endif
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{
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_edata = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(0x4);
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_end = .;
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} > DRAM
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#endif
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.audiobuf ALIGN(4) :
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{
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_audiobuffer = .;
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audiobuffer = .;
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} > DRAM
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.audiobufend ENDAUDIOADDR:
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{
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audiobufend = .;
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_audiobufend = .;
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} > DRAM
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.codec ENDAUDIOADDR:
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{
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codecbuf = .;
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_codecbuf = .;
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}
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.plugin ENDADDR:
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{
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_pluginbuf = .;
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pluginbuf = .;
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}
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}
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