268 lines
6.1 KiB
C
268 lines
6.1 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* This file was automatically generated by headergen, DO NOT EDIT it.
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* headergen version: 2.1.7
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* XML versions: stmp3600:2.3.0
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*
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* Copyright (C) 2013 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __HEADERGEN__STMP3600__ARC__H__
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#define __HEADERGEN__STMP3600__ARC__H__
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#define REGS_ARC_BASE (0x80080000)
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#define REGS_ARC_VERSION "2.3.0"
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/**
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* Register: HW_ARC_BASE
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* Address: 0
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* SCT: no
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*/
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#define HW_ARC_BASE (*(volatile unsigned long *)(REGS_ARC_BASE + 0x0))
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/**
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* Register: HW_ARC_ID
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* Address: 0
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* SCT: no
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*/
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#define HW_ARC_ID (*(volatile unsigned long *)(REGS_ARC_BASE + 0x0))
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/**
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* Register: HW_ARC_HCSPARAMS
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* Address: 0x104
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* SCT: no
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*/
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#define HW_ARC_HCSPARAMS (*(volatile unsigned long *)(REGS_ARC_BASE + 0x104))
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/**
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* Register: HW_ARC_USBCMD
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* Address: 0x140
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* SCT: no
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*/
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#define HW_ARC_USBCMD (*(volatile unsigned long *)(REGS_ARC_BASE + 0x140))
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/**
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* Register: HW_ARC_USBSTS
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* Address: 0x144
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* SCT: no
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*/
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#define HW_ARC_USBSTS (*(volatile unsigned long *)(REGS_ARC_BASE + 0x144))
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/**
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* Register: HW_ARC_USBINTR
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* Address: 0x148
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* SCT: no
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*/
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#define HW_ARC_USBINTR (*(volatile unsigned long *)(REGS_ARC_BASE + 0x148))
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/**
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* Register: HW_ARC_FRINDEX
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* Address: 0x14c
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* SCT: no
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*/
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#define HW_ARC_FRINDEX (*(volatile unsigned long *)(REGS_ARC_BASE + 0x14c))
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/**
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* Register: HW_ARC_DEVADDR
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* Address: 0x154
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* SCT: no
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*/
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#define HW_ARC_DEVADDR (*(volatile unsigned long *)(REGS_ARC_BASE + 0x154))
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/**
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* Register: HW_ARC_ENDPTLISTADDR
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* Address: 0x158
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* SCT: no
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*/
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#define HW_ARC_ENDPTLISTADDR (*(volatile unsigned long *)(REGS_ARC_BASE + 0x158))
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/**
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* Register: HW_ARC_PORTSC1
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* Address: 0x184
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* SCT: no
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*/
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#define HW_ARC_PORTSC1 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x184))
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/**
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* Register: HW_ARC_OTGSC
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* Address: 0x1a4
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* SCT: no
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*/
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#define HW_ARC_OTGSC (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1a4))
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/**
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* Register: HW_ARC_USBMODE
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* Address: 0x1a8
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* SCT: no
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*/
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#define HW_ARC_USBMODE (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1a8))
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/**
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* Register: HW_ARC_ENDPTSETUPSTAT
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* Address: 0x1ac
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* SCT: no
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*/
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#define HW_ARC_ENDPTSETUPSTAT (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1ac))
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/**
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* Register: HW_ARC_ENDPTPRIME
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* Address: 0x1b0
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* SCT: no
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*/
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#define HW_ARC_ENDPTPRIME (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1b0))
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/**
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* Register: HW_ARC_ENDPTFLUSH
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* Address: 0x1b4
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* SCT: no
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*/
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#define HW_ARC_ENDPTFLUSH (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1b4))
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/**
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* Register: HW_ARC_ENDPTSTATUS
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* Address: 0x1b8
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* SCT: no
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*/
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#define HW_ARC_ENDPTSTATUS (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1b8))
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/**
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* Register: HW_ARC_ENDPTCOMPLETE
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* Address: 0x1bc
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* SCT: no
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*/
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#define HW_ARC_ENDPTCOMPLETE (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1bc))
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/**
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* Register: HW_ARC_ENDPTCTRL0
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* Address: 0x1c0
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL0 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1c0))
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/**
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* Register: HW_ARC_ENDPTCTRL1
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* Address: 0x1c4
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL1 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1c4))
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/**
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* Register: HW_ARC_ENDPTCTRL2
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* Address: 0x1c8
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL2 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1c8))
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/**
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* Register: HW_ARC_ENDPTCTRL3
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* Address: 0x1cc
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL3 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1cc))
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/**
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* Register: HW_ARC_ENDPTCTRL4
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* Address: 0x1d0
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL4 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1d0))
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/**
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* Register: HW_ARC_ENDPTCTRL5
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* Address: 0x1d4
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL5 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1d4))
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/**
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* Register: HW_ARC_ENDPTCTRL6
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* Address: 0x1d8
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL6 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1d8))
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/**
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* Register: HW_ARC_ENDPTCTRL7
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* Address: 0x1dc
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL7 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1dc))
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/**
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* Register: HW_ARC_ENDPTCTRL8
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* Address: 0x1e0
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL8 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1e0))
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/**
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* Register: HW_ARC_ENDPTCTRL9
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* Address: 0x1e4
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL9 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1e4))
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/**
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* Register: HW_ARC_ENDPTCTRL10
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* Address: 0x1e8
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL10 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1e8))
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/**
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* Register: HW_ARC_ENDPTCTRL11
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* Address: 0x1ec
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL11 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1ec))
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/**
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* Register: HW_ARC_ENDPTCTRL12
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* Address: 0x1f0
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL12 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1f0))
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/**
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* Register: HW_ARC_ENDPTCTRL13
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* Address: 0x1f4
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL13 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1f4))
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/**
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* Register: HW_ARC_ENDPTCTRL14
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* Address: 0x1f8
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL14 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1f8))
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/**
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* Register: HW_ARC_ENDPTCTRL15
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* Address: 0x1fc
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRL15 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1fc))
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/**
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* Register: HW_ARC_ENDPTCTRLn
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* Address: 0x1c0+n*0x4
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* SCT: no
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*/
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#define HW_ARC_ENDPTCTRLn(n) (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1c0+(n)*0x4))
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#endif /* __HEADERGEN__STMP3600__ARC__H__ */
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