/*************************************************************************** * __________ __ ___. * Open \______ \ ____ ____ | | _\_ |__ _______ ___ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ * \/ \/ \/ \/ \/ * This file was automatically generated by headergen, DO NOT EDIT it. * headergen version: 3.0.0 * stmp3600 version: 2.4.0 * stmp3600 authors: Amaury Pouly * * Copyright (C) 2015 by the authors * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY * KIND, either express or implied. * ****************************************************************************/ #ifndef __HEADERGEN_STMP3600_PINCTRL_H__ #define __HEADERGEN_STMP3600_PINCTRL_H__ #define HW_PINCTRL_CTRL HW(PINCTRL_CTRL) #define HWA_PINCTRL_CTRL (0x80018000 + 0x0) #define HWT_PINCTRL_CTRL HWIO_32_RW #define HWN_PINCTRL_CTRL PINCTRL_CTRL #define HWI_PINCTRL_CTRL #define HW_PINCTRL_CTRL_SET HW(PINCTRL_CTRL_SET) #define HWA_PINCTRL_CTRL_SET (HWA_PINCTRL_CTRL + 0x4) #define HWT_PINCTRL_CTRL_SET HWIO_32_WO #define HWN_PINCTRL_CTRL_SET PINCTRL_CTRL #define HWI_PINCTRL_CTRL_SET #define HW_PINCTRL_CTRL_CLR HW(PINCTRL_CTRL_CLR) #define HWA_PINCTRL_CTRL_CLR (HWA_PINCTRL_CTRL + 0x8) #define HWT_PINCTRL_CTRL_CLR HWIO_32_WO #define HWN_PINCTRL_CTRL_CLR PINCTRL_CTRL #define HWI_PINCTRL_CTRL_CLR #define HW_PINCTRL_CTRL_TOG HW(PINCTRL_CTRL_TOG) #define HWA_PINCTRL_CTRL_TOG (HWA_PINCTRL_CTRL + 0xc) #define HWT_PINCTRL_CTRL_TOG HWIO_32_WO #define HWN_PINCTRL_CTRL_TOG PINCTRL_CTRL #define HWI_PINCTRL_CTRL_TOG #define BP_PINCTRL_CTRL_SFTRST 31 #define BM_PINCTRL_CTRL_SFTRST 0x80000000 #define BF_PINCTRL_CTRL_SFTRST(v) (((v) & 0x1) << 31) #define BFM_PINCTRL_CTRL_SFTRST(v) BM_PINCTRL_CTRL_SFTRST #define BF_PINCTRL_CTRL_SFTRST_V(e) BF_PINCTRL_CTRL_SFTRST(BV_PINCTRL_CTRL_SFTRST__##e) #define BFM_PINCTRL_CTRL_SFTRST_V(v) BM_PINCTRL_CTRL_SFTRST #define BP_PINCTRL_CTRL_CLKGATE 30 #define BM_PINCTRL_CTRL_CLKGATE 0x40000000 #define BF_PINCTRL_CTRL_CLKGATE(v) (((v) & 0x1) << 30) #define BFM_PINCTRL_CTRL_CLKGATE(v) BM_PINCTRL_CTRL_CLKGATE #define BF_PINCTRL_CTRL_CLKGATE_V(e) BF_PINCTRL_CTRL_CLKGATE(BV_PINCTRL_CTRL_CLKGATE__##e) #define BFM_PINCTRL_CTRL_CLKGATE_V(v) BM_PINCTRL_CTRL_CLKGATE #define BP_PINCTRL_CTRL_PRESENT3 29 #define BM_PINCTRL_CTRL_PRESENT3 0x20000000 #define BF_PINCTRL_CTRL_PRESENT3(v) (((v) & 0x1) << 29) #define BFM_PINCTRL_CTRL_PRESENT3(v) BM_PINCTRL_CTRL_PRESENT3 #define BF_PINCTRL_CTRL_PRESENT3_V(e) BF_PINCTRL_CTRL_PRESENT3(BV_PINCTRL_CTRL_PRESENT3__##e) #define BFM_PINCTRL_CTRL_PRESENT3_V(v) BM_PINCTRL_CTRL_PRESENT3 #define BP_PINCTRL_CTRL_PRESENT2 28 #define BM_PINCTRL_CTRL_PRESENT2 0x10000000 #define BF_PINCTRL_CTRL_PRESENT2(v) (((v) & 0x1) << 28) #define BFM_PINCTRL_CTRL_PRESENT2(v) BM_PINCTRL_CTRL_PRESENT2 #define BF_PINCTRL_CTRL_PRESENT2_V(e) BF_PINCTRL_CTRL_PRESENT2(BV_PINCTRL_CTRL_PRESENT2__##e) #define BFM_PINCTRL_CTRL_PRESENT2_V(v) BM_PINCTRL_CTRL_PRESENT2 #define BP_PINCTRL_CTRL_PRESENT1 27 #define BM_PINCTRL_CTRL_PRESENT1 0x8000000 #define BF_PINCTRL_CTRL_PRESENT1(v) (((v) & 0x1) << 27) #define BFM_PINCTRL_CTRL_PRESENT1(v) BM_PINCTRL_CTRL_PRESENT1 #define BF_PINCTRL_CTRL_PRESENT1_V(e) BF_PINCTRL_CTRL_PRESENT1(BV_PINCTRL_CTRL_PRESENT1__##e) #define BFM_PINCTRL_CTRL_PRESENT1_V(v) BM_PINCTRL_CTRL_PRESENT1 #define BP_PINCTRL_CTRL_PRESENT0 26 #define BM_PINCTRL_CTRL_PRESENT0 0x4000000 #define BF_PINCTRL_CTRL_PRESENT0(v) (((v) & 0x1) << 26) #define BFM_PINCTRL_CTRL_PRESENT0(v) BM_PINCTRL_CTRL_PRESENT0 #define BF_PINCTRL_CTRL_PRESENT0_V(e) BF_PINCTRL_CTRL_PRESENT0(BV_PINCTRL_CTRL_PRESENT0__##e) #define BFM_PINCTRL_CTRL_PRESENT0_V(v) BM_PINCTRL_CTRL_PRESENT0 #define BP_PINCTRL_CTRL_IRQOUT3 3 #define BM_PINCTRL_CTRL_IRQOUT3 0x8 #define BF_PINCTRL_CTRL_IRQOUT3(v) (((v) & 0x1) << 3) #define BFM_PINCTRL_CTRL_IRQOUT3(v) BM_PINCTRL_CTRL_IRQOUT3 #define BF_PINCTRL_CTRL_IRQOUT3_V(e) BF_PINCTRL_CTRL_IRQOUT3(BV_PINCTRL_CTRL_IRQOUT3__##e) #define BFM_PINCTRL_CTRL_IRQOUT3_V(v) BM_PINCTRL_CTRL_IRQOUT3 #define BP_PINCTRL_CTRL_IRQOUT2 2 #define BM_PINCTRL_CTRL_IRQOUT2 0x4 #define BF_PINCTRL_CTRL_IRQOUT2(v) (((v) & 0x1) << 2) #define BFM_PINCTRL_CTRL_IRQOUT2(v) BM_PINCTRL_CTRL_IRQOUT2 #define BF_PINCTRL_CTRL_IRQOUT2_V(e) BF_PINCTRL_CTRL_IRQOUT2(BV_PINCTRL_CTRL_IRQOUT2__##e) #define BFM_PINCTRL_CTRL_IRQOUT2_V(v) BM_PINCTRL_CTRL_IRQOUT2 #define BP_PINCTRL_CTRL_IRQOUT1 1 #define BM_PINCTRL_CTRL_IRQOUT1 0x2 #define BF_PINCTRL_CTRL_IRQOUT1(v) (((v) & 0x1) << 1) #define BFM_PINCTRL_CTRL_IRQOUT1(v) BM_PINCTRL_CTRL_IRQOUT1 #define BF_PINCTRL_CTRL_IRQOUT1_V(e) BF_PINCTRL_CTRL_IRQOUT1(BV_PINCTRL_CTRL_IRQOUT1__##e) #define BFM_PINCTRL_CTRL_IRQOUT1_V(v) BM_PINCTRL_CTRL_IRQOUT1 #define BP_PINCTRL_CTRL_IRQOUT0 0 #define BM_PINCTRL_CTRL_IRQOUT0 0x1 #define BF_PINCTRL_CTRL_IRQOUT0(v) (((v) & 0x1) << 0) #define BFM_PINCTRL_CTRL_IRQOUT0(v) BM_PINCTRL_CTRL_IRQOUT0 #define BF_PINCTRL_CTRL_IRQOUT0_V(e) BF_PINCTRL_CTRL_IRQOUT0(BV_PINCTRL_CTRL_IRQOUT0__##e) #define BFM_PINCTRL_CTRL_IRQOUT0_V(v) BM_PINCTRL_CTRL_IRQOUT0 #define HW_PINCTRL_MUXSELLn(_n1) HW(PINCTRL_MUXSELLn(_n1)) #define HWA_PINCTRL_MUXSELLn(_n1) (0x80018000 + 0x10 + (_n1) * 0x100) #define HWT_PINCTRL_MUXSELLn(_n1) HWIO_32_RW #define HWN_PINCTRL_MUXSELLn(_n1) PINCTRL_MUXSELLn #define HWI_PINCTRL_MUXSELLn(_n1) (_n1) #define HW_PINCTRL_MUXSELLn_SET(_n1) HW(PINCTRL_MUXSELLn_SET(_n1)) #define HWA_PINCTRL_MUXSELLn_SET(_n1) (HWA_PINCTRL_MUXSELLn(_n1) + 0x4) #define HWT_PINCTRL_MUXSELLn_SET(_n1) HWIO_32_WO #define HWN_PINCTRL_MUXSELLn_SET(_n1) PINCTRL_MUXSELLn #define HWI_PINCTRL_MUXSELLn_SET(_n1) (_n1) #define HW_PINCTRL_MUXSELLn_CLR(_n1) HW(PINCTRL_MUXSELLn_CLR(_n1)) #define HWA_PINCTRL_MUXSELLn_CLR(_n1) (HWA_PINCTRL_MUXSELLn(_n1) + 0x8) #define HWT_PINCTRL_MUXSELLn_CLR(_n1) HWIO_32_WO #define HWN_PINCTRL_MUXSELLn_CLR(_n1) PINCTRL_MUXSELLn #define HWI_PINCTRL_MUXSELLn_CLR(_n1) (_n1) #define HW_PINCTRL_MUXSELLn_TOG(_n1) HW(PINCTRL_MUXSELLn_TOG(_n1)) #define HWA_PINCTRL_MUXSELLn_TOG(_n1) (HWA_PINCTRL_MUXSELLn(_n1) + 0xc) #define HWT_PINCTRL_MUXSELLn_TOG(_n1) HWIO_32_WO #define HWN_PINCTRL_MUXSELLn_TOG(_n1) PINCTRL_MUXSELLn #define HWI_PINCTRL_MUXSELLn_TOG(_n1) (_n1) #define BP_PINCTRL_MUXSELLn_BITS 0 #define BM_PINCTRL_MUXSELLn_BITS 0xffffffff #define BF_PINCTRL_MUXSELLn_BITS(v) (((v) & 0xffffffff) << 0) #define BFM_PINCTRL_MUXSELLn_BITS(v) BM_PINCTRL_MUXSELLn_BITS #define BF_PINCTRL_MUXSELLn_BITS_V(e) BF_PINCTRL_MUXSELLn_BITS(BV_PINCTRL_MUXSELLn_BITS__##e) #define BFM_PINCTRL_MUXSELLn_BITS_V(v) BM_PINCTRL_MUXSELLn_BITS #define HW_PINCTRL_MUXSELHn(_n1) HW(PINCTRL_MUXSELHn(_n1)) #define HWA_PINCTRL_MUXSELHn(_n1) (0x80018000 + 0x20 + (_n1) * 0x100) #define HWT_PINCTRL_MUXSELHn(_n1) HWIO_32_RW #define HWN_PINCTRL_MUXSELHn(_n1) PINCTRL_MUXSELHn #define HWI_PINCTRL_MUXSELHn(_n1) (_n1) #define HW_PINCTRL_MUXSELHn_SET(_n1) HW(PINCTRL_MUXSELHn_SET(_n1)) #define HWA_PINCTRL_MUXSELHn_SET(_n1) (HWA_PINCTRL_MUXSELHn(_n1) + 0x4) #define HWT_PINCTRL_MUXSELHn_SET(_n1) HWIO_32_WO #define HWN_PINCTRL_MUXSELHn_SET(_n1) PINCTRL_MUXSELHn #define HWI_PINCTRL_MUXSELHn_SET(_n1) (_n1) #define HW_PINCTRL_MUXSELHn_CLR(_n1) HW(PINCTRL_MUXSELHn_CLR(_n1)) #define HWA_PINCTRL_MUXSELHn_CLR(_n1) (HWA_PINCTRL_MUXSELHn(_n1) + 0x8) #define HWT_PINCTRL_MUXSELHn_CLR(_n1) HWIO_32_WO #define HWN_PINCTRL_MUXSELHn_CLR(_n1) PINCTRL_MUXSELHn #define HWI_PINCTRL_MUXSELHn_CLR(_n1) (_n1) #define HW_PINCTRL_MUXSELHn_TOG(_n1) HW(PINCTRL_MUXSELHn_TOG(_n1)) #define HWA_PINCTRL_MUXSELHn_TOG(_n1) (HWA_PINCTRL_MUXSELHn(_n1) + 0xc) #define HWT_PINCTRL_MUXSELHn_TOG(_n1) HWIO_32_WO #define HWN_PINCTRL_MUXSELHn_TOG(_n1) PINCTRL_MUXSELHn #define HWI_PINCTRL_MUXSELHn_TOG(_n1) (_n1) #define BP_PINCTRL_MUXSELHn_BITS 0 #define BM_PINCTRL_MUXSELHn_BITS 0xffffffff #define BF_PINCTRL_MUXSELHn_BITS(v) (((v) & 0xffffffff) << 0) #define BFM_PINCTRL_MUXSELHn_BITS(v) BM_PINCTRL_MUXSELHn_BITS #define BF_PINCTRL_MUXSELHn_BITS_V(e) BF_PINCTRL_MUXSELHn_BITS(BV_PINCTRL_MUXSELHn_BITS__##e) #define BFM_PINCTRL_MUXSELHn_BITS_V(v) BM_PINCTRL_MUXSELHn_BITS #define HW_PINCTRL_DRIVEn(_n1) HW(PINCTRL_DRIVEn(_n1)) #define HWA_PINCTRL_DRIVEn(_n1) (0x80018000 + 0x30 + (_n1) * 0x100) #define HWT_PINCTRL_DRIVEn(_n1) HWIO_32_RW #define HWN_PINCTRL_DRIVEn(_n1) PINCTRL_DRIVEn #define HWI_PINCTRL_DRIVEn(_n1) (_n1) #define HW_PINCTRL_DRIVEn_SET(_n1) HW(PINCTRL_DRIVEn_SET(_n1)) #define HWA_PINCTRL_DRIVEn_SET(_n1) (HWA_PINCTRL_DRIVEn(_n1) + 0x4) #define HWT_PINCTRL_DRIVEn_SET(_n1) HWIO_32_WO #define HWN_PINCTRL_DRIVEn_SET(_n1) PINCTRL_DRIVEn #define HWI_PINCTRL_DRIVEn_SET(_n1) (_n1) #define HW_PINCTRL_DRIVEn_CLR(_n1) HW(PINCTRL_DRIVEn_CLR(_n1)) #define HWA_PINCTRL_DRIVEn_CLR(_n1) (HWA_PINCTRL_DRIVEn(_n1) + 0x8) #define HWT_PINCTRL_DRIVEn_CLR(_n1) HWIO_32_WO #define HWN_PINCTRL_DRIVEn_CLR(_n1) PINCTRL_DRIVEn #define HWI_PINCTRL_DRIVEn_CLR(_n1) (_n1) #define HW_PINCTRL_DRIVEn_TOG(_n1) HW(PINCTRL_DRIVEn_TOG(_n1)) #define HWA_PINCTRL_DRIVEn_TOG(_n1) (HWA_PINCTRL_DRIVEn(_n1) + 0xc) #define HWT_PINCTRL_DRIVEn_TOG(_n1) HWIO_32_WO #define HWN_PINCTRL_DRIVEn_TOG(_n1) PINCTRL_DRIVEn #define HWI_PINCTRL_DRIVEn_TOG(_n1) (_n1) #define BP_PINCTRL_DRIVEn_BITS 0 #define BM_PINCTRL_DRIVEn_BITS 0xffffffff #define BF_PINCTRL_DRIVEn_BITS(v) (((v) & 0xffffffff) << 0) #define BFM_PINCTRL_DRIVEn_BITS(v) BM_PINCTRL_DRIVEn_BITS #define BF_PINCTRL_DRIVEn_BITS_V(e) BF_PINCTRL_DRIVEn_BITS(BV_PINCTRL_DRIVEn_BITS__##e) #define BFM_PINCTRL_DRIVEn_BITS_V(v) BM_PINCTRL_DRIVEn_BITS #define HW_PINCTRL_DOUTn(_n1) HW(PINCTRL_DOUTn(_n1)) #define HWA_PINCTRL_DOUTn(_n1) (0x80018000 + 0x50 + (_n1) * 0x100) #define HWT_PINCTRL_DOUTn(_n1) HWIO_32_RW #define HWN_PINCTRL_DOUTn(_n1) PINCTRL_DOUTn #define HWI_PINCTRL_DOUTn(_n1) (_n1) #define HW_PINCTRL_DOUTn_SET(_n1) HW(PINCTRL_DOUTn_SET(_n1)) #define HWA_PINCTRL_DOUTn_SET(_n1) (HWA_PINCTRL_DOUTn(_n1) + 0x4) #define HWT_PINCTRL_DOUTn_SET(_n1) HWIO_32_WO #define HWN_PINCTRL_DOUTn_SET(_n1) PINCTRL_DOUTn #define HWI_PINCTRL_DOUTn_SET(_n1) (_n1) #define HW_PINCTRL_DOUTn_CLR(_n1) HW(PINCTRL_DOUTn_CLR(_n1)) #define HWA_PINCTRL_DOUTn_CLR(_n1) (HWA_PINCTRL_DOUTn(_n1) + 0x8) #define HWT_PINCTRL_DOUTn_CLR(_n1) HWIO_32_WO #define HWN_PINCTRL_DOUTn_CLR(_n1) PINCTRL_DOUTn #define HWI_PINCTRL_DOUTn_CLR(_n1) (_n1) #define HW_PINCTRL_DOUTn_TOG(_n1) HW(PINCTRL_DOUTn_TOG(_n1)) #define HWA_PINCTRL_DOUTn_TOG(_n1) (HWA_PINCTRL_DOUTn(_n1) + 0xc) #define HWT_PINCTRL_DOUTn_TOG(_n1) HWIO_32_WO #define HWN_PINCTRL_DOUTn_TOG(_n1) PINCTRL_DOUTn #define HWI_PINCTRL_DOUTn_TOG(_n1) (_n1) #define BP_PINCTRL_DOUTn_BITS 0 #define BM_PINCTRL_DOUTn_BITS 0xffffffff #define BF_PINCTRL_DOUTn_BITS(v) (((v) & 0xffffffff) << 0) #define BFM_PINCTRL_DOUTn_BITS(v) BM_PINCTRL_DOUTn_BITS #define BF_PINCTRL_DOUTn_BITS_V(e) BF_PINCTRL_DOUTn_BITS(BV_PINCTRL_DOUTn_BITS__##e) #define BFM_PINCTRL_DOUTn_BITS_V(v) BM_PINCTRL_DOUTn_BITS #define HW_PINCTRL_DINn(_n1) HW(PINCTRL_DINn(_n1)) #define HWA_PINCTRL_DINn(_n1) (0x80018000 + 0x60 + (_n1) * 0x100) #define HWT_PINCTRL_DINn(_n1) HWIO_32_RW #define HWN_PINCTRL_DINn(_n1) PINCTRL_DINn #define HWI_PINCTRL_DINn(_n1) (_n1) #define HW_PINCTRL_DINn_SET(_n1) HW(PINCTRL_DINn_SET(_n1)) #define HWA_PINCTRL_DINn_SET(_n1) (HWA_PINCTRL_DINn(_n1) + 0x4) #define HWT_PINCTRL_DINn_SET(_n1) HWIO_32_WO #define HWN_PINCTRL_DINn_SET(_n1) PINCTRL_DINn #define HWI_PINCTRL_DINn_SET(_n1) (_n1) #define HW_PINCTRL_DINn_CLR(_n1) HW(PINCTRL_DINn_CLR(_n1)) #define HWA_PINCTRL_DINn_CLR(_n1) (HWA_PINCTRL_DINn(_n1) + 0x8) #define HWT_PINCTRL_DINn_CLR(_n1) HWIO_32_WO #define HWN_PINCTRL_DINn_CLR(_n1) PINCTRL_DINn #define HWI_PINCTRL_DINn_CLR(_n1) (_n1) #define HW_PINCTRL_DINn_TOG(_n1) HW(PINCTRL_DINn_TOG(_n1)) #define HWA_PINCTRL_DINn_TOG(_n1) (HWA_PINCTRL_DINn(_n1) + 0xc) #define HWT_PINCTRL_DINn_TOG(_n1) HWIO_32_WO #define HWN_PINCTRL_DINn_TOG(_n1) PINCTRL_DINn #define HWI_PINCTRL_DINn_TOG(_n1) (_n1) #define BP_PINCTRL_DINn_BITS 0 #define BM_PINCTRL_DINn_BITS 0xffffffff #define BF_PINCTRL_DINn_BITS(v) (((v) & 0xffffffff) << 0) #define BFM_PINCTRL_DINn_BITS(v) BM_PINCTRL_DINn_BITS #define BF_PINCTRL_DINn_BITS_V(e) BF_PINCTRL_DINn_BITS(BV_PINCTRL_DINn_BITS__##e) #define BFM_PINCTRL_DINn_BITS_V(v) BM_PINCTRL_DINn_BITS #define HW_PINCTRL_DOEn(_n1) HW(PINCTRL_DOEn(_n1)) #define HWA_PINCTRL_DOEn(_n1) (0x80018000 + 0x70 + (_n1) * 0x100) #define HWT_PINCTRL_DOEn(_n1) HWIO_32_RW #define HWN_PINCTRL_DOEn(_n1) PINCTRL_DOEn #define HWI_PINCTRL_DOEn(_n1) (_n1) #define HW_PINCTRL_DOEn_SET(_n1) HW(PINCTRL_DOEn_SET(_n1)) #define HWA_PINCTRL_DOEn_SET(_n1) (HWA_PINCTRL_DOEn(_n1) + 0x4) #define HWT_PINCTRL_DOEn_SET(_n1) HWIO_32_WO #define HWN_PINCTRL_DOEn_SET(_n1) PINCTRL_DOEn #define HWI_PINCTRL_DOEn_SET(_n1) (_n1) #define HW_PINCTRL_DOEn_CLR(_n1) HW(PINCTRL_DOEn_CLR(_n1)) #define HWA_PINCTRL_DOEn_CLR(_n1) (HWA_PINCTRL_DOEn(_n1) + 0x8) #define HWT_PINCTRL_DOEn_CLR(_n1) HWIO_32_WO #define HWN_PINCTRL_DOEn_CLR(_n1) PINCTRL_DOEn #define HWI_PINCTRL_DOEn_CLR(_n1) (_n1) #define HW_PINCTRL_DOEn_TOG(_n1) HW(PINCTRL_DOEn_TOG(_n1)) #define HWA_PINCTRL_DOEn_TOG(_n1) (HWA_PINCTRL_DOEn(_n1) + 0xc) #define HWT_PINCTRL_DOEn_TOG(_n1) HWIO_32_WO #define HWN_PINCTRL_DOEn_TOG(_n1) PINCTRL_DOEn #define HWI_PINCTRL_DOEn_TOG(_n1) (_n1) #define BP_PINCTRL_DOEn_BITS 0 #define BM_PINCTRL_DOEn_BITS 0xffffffff #define BF_PINCTRL_DOEn_BITS(v) (((v) & 0xffffffff) << 0) #define BFM_PINCTRL_DOEn_BITS(v) BM_PINCTRL_DOEn_BITS #define BF_PINCTRL_DOEn_BITS_V(e) BF_PINCTRL_DOEn_BITS(BV_PINCTRL_DOEn_BITS__##e) #define BFM_PINCTRL_DOEn_BITS_V(v) BM_PINCTRL_DOEn_BITS #define HW_PINCTRL_PIN2IRQn(_n1) HW(PINCTRL_PIN2IRQn(_n1)) #define HWA_PINCTRL_PIN2IRQn(_n1) (0x80018000 + 0x80 + (_n1) * 0x100) #define HWT_PINCTRL_PIN2IRQn(_n1) HWIO_32_RW #define HWN_PINCTRL_PIN2IRQn(_n1) PINCTRL_PIN2IRQn #define HWI_PINCTRL_PIN2IRQn(_n1) (_n1) #define HW_PINCTRL_PIN2IRQn_SET(_n1) HW(PINCTRL_PIN2IRQn_SET(_n1)) #define HWA_PINCTRL_PIN2IRQn_SET(_n1) (HWA_PINCTRL_PIN2IRQn(_n1) + 0x4) #define HWT_PINCTRL_PIN2IRQn_SET(_n1) HWIO_32_WO #define HWN_PINCTRL_PIN2IRQn_SET(_n1) PINCTRL_PIN2IRQn #define HWI_PINCTRL_PIN2IRQn_SET(_n1) (_n1) #define HW_PINCTRL_PIN2IRQn_CLR(_n1) HW(PINCTRL_PIN2IRQn_CLR(_n1)) #define HWA_PINCTRL_PIN2IRQn_CLR(_n1) (HWA_PINCTRL_PIN2IRQn(_n1) + 0x8) #define HWT_PINCTRL_PIN2IRQn_CLR(_n1) HWIO_32_WO #define HWN_PINCTRL_PIN2IRQn_CLR(_n1) PINCTRL_PIN2IRQn #define HWI_PINCTRL_PIN2IRQn_CLR(_n1) (_n1) #define HW_PINCTRL_PIN2IRQn_TOG(_n1) HW(PINCTRL_PIN2IRQn_TOG(_n1)) #define HWA_PINCTRL_PIN2IRQn_TOG(_n1) (HWA_PINCTRL_PIN2IRQn(_n1) + 0xc) #define HWT_PINCTRL_PIN2IRQn_TOG(_n1) HWIO_32_WO #define HWN_PINCTRL_PIN2IRQn_TOG(_n1) PINCTRL_PIN2IRQn #define HWI_PINCTRL_PIN2IRQn_TOG(_n1) (_n1) #define BP_PINCTRL_PIN2IRQn_BITS 0 #define BM_PINCTRL_PIN2IRQn_BITS 0xffffffff #define BF_PINCTRL_PIN2IRQn_BITS(v) (((v) & 0xffffffff) << 0) #define BFM_PINCTRL_PIN2IRQn_BITS(v) BM_PINCTRL_PIN2IRQn_BITS #define BF_PINCTRL_PIN2IRQn_BITS_V(e) BF_PINCTRL_PIN2IRQn_BITS(BV_PINCTRL_PIN2IRQn_BITS__##e) #define BFM_PINCTRL_PIN2IRQn_BITS_V(v) BM_PINCTRL_PIN2IRQn_BITS #define HW_PINCTRL_IRQENn(_n1) HW(PINCTRL_IRQENn(_n1)) #define HWA_PINCTRL_IRQENn(_n1) (0x80018000 + 0x90 + (_n1) * 0x100) #define HWT_PINCTRL_IRQENn(_n1) HWIO_32_RW #define HWN_PINCTRL_IRQENn(_n1) PINCTRL_IRQENn #define HWI_PINCTRL_IRQENn(_n1) (_n1) #define HW_PINCTRL_IRQENn_SET(_n1) HW(PINCTRL_IRQENn_SET(_n1)) #define HWA_PINCTRL_IRQENn_SET(_n1) (HWA_PINCTRL_IRQENn(_n1) + 0x4) #define HWT_PINCTRL_IRQENn_SET(_n1) HWIO_32_WO #define HWN_PINCTRL_IRQENn_SET(_n1) PINCTRL_IRQENn #define HWI_PINCTRL_IRQENn_SET(_n1) (_n1) #define HW_PINCTRL_IRQENn_CLR(_n1) HW(PINCTRL_IRQENn_CLR(_n1)) #define HWA_PINCTRL_IRQENn_CLR(_n1) (HWA_PINCTRL_IRQENn(_n1) + 0x8) #define HWT_PINCTRL_IRQENn_CLR(_n1) HWIO_32_WO #define HWN_PINCTRL_IRQENn_CLR(_n1) PINCTRL_IRQENn #define HWI_PINCTRL_IRQENn_CLR(_n1) (_n1) #define HW_PINCTRL_IRQENn_TOG(_n1) HW(PINCTRL_IRQENn_TOG(_n1)) #define HWA_PINCTRL_IRQENn_TOG(_n1) (HWA_PINCTRL_IRQENn(_n1) + 0xc) #define HWT_PINCTRL_IRQENn_TOG(_n1) HWIO_32_WO #define HWN_PINCTRL_IRQENn_TOG(_n1) PINCTRL_IRQENn #define HWI_PINCTRL_IRQENn_TOG(_n1) (_n1) #define BP_PINCTRL_IRQENn_BITS 0 #define BM_PINCTRL_IRQENn_BITS 0xffffffff #define BF_PINCTRL_IRQENn_BITS(v) (((v) & 0xffffffff) << 0) #define BFM_PINCTRL_IRQENn_BITS(v) BM_PINCTRL_IRQENn_BITS #define BF_PINCTRL_IRQENn_BITS_V(e) BF_PINCTRL_IRQENn_BITS(BV_PINCTRL_IRQENn_BITS__##e) #define BFM_PINCTRL_IRQENn_BITS_V(v) BM_PINCTRL_IRQENn_BITS #define HW_PINCTRL_IRQLEVELn(_n1) HW(PINCTRL_IRQLEVELn(_n1)) #define HWA_PINCTRL_IRQLEVELn(_n1) (0x80018000 + 0xa0 + (_n1) * 0x100) #define HWT_PINCTRL_IRQLEVELn(_n1) HWIO_32_RW #define HWN_PINCTRL_IRQLEVELn(_n1) PINCTRL_IRQLEVELn #define HWI_PINCTRL_IRQLEVELn(_n1) (_n1) #define HW_PINCTRL_IRQLEVELn_SET(_n1) HW(PINCTRL_IRQLEVELn_SET(_n1)) #define HWA_PINCTRL_IRQLEVELn_SET(_n1) (HWA_PINCTRL_IRQLEVELn(_n1) + 0x4) #define HWT_PINCTRL_IRQLEVELn_SET(_n1) HWIO_32_WO #define HWN_PINCTRL_IRQLEVELn_SET(_n1) PINCTRL_IRQLEVELn #define HWI_PINCTRL_IRQLEVELn_SET(_n1) (_n1) #define HW_PINCTRL_IRQLEVELn_CLR(_n1) HW(PINCTRL_IRQLEVELn_CLR(_n1)) #define HWA_PINCTRL_IRQLEVELn_CLR(_n1) (HWA_PINCTRL_IRQLEVELn(_n1) + 0x8) #define HWT_PINCTRL_IRQLEVELn_CLR(_n1) HWIO_32_WO #define HWN_PINCTRL_IRQLEVELn_CLR(_n1) PINCTRL_IRQLEVELn #define HWI_PINCTRL_IRQLEVELn_CLR(_n1) (_n1) #define HW_PINCTRL_IRQLEVELn_TOG(_n1) HW(PINCTRL_IRQLEVELn_TOG(_n1)) #define HWA_PINCTRL_IRQLEVELn_TOG(_n1) (HWA_PINCTRL_IRQLEVELn(_n1) + 0xc) #define HWT_PINCTRL_IRQLEVELn_TOG(_n1) HWIO_32_WO #define HWN_PINCTRL_IRQLEVELn_TOG(_n1) PINCTRL_IRQLEVELn #define HWI_PINCTRL_IRQLEVELn_TOG(_n1) (_n1) #define BP_PINCTRL_IRQLEVELn_BITS 0 #define BM_PINCTRL_IRQLEVELn_BITS 0xffffffff #define BF_PINCTRL_IRQLEVELn_BITS(v) (((v) & 0xffffffff) << 0) #define BFM_PINCTRL_IRQLEVELn_BITS(v) BM_PINCTRL_IRQLEVELn_BITS #define BF_PINCTRL_IRQLEVELn_BITS_V(e) BF_PINCTRL_IRQLEVELn_BITS(BV_PINCTRL_IRQLEVELn_BITS__##e) #define BFM_PINCTRL_IRQLEVELn_BITS_V(v) BM_PINCTRL_IRQLEVELn_BITS #define HW_PINCTRL_IRQPOLn(_n1) HW(PINCTRL_IRQPOLn(_n1)) #define HWA_PINCTRL_IRQPOLn(_n1) (0x80018000 + 0xb0 + (_n1) * 0x100) #define HWT_PINCTRL_IRQPOLn(_n1) HWIO_32_RW #define HWN_PINCTRL_IRQPOLn(_n1) PINCTRL_IRQPOLn #define HWI_PINCTRL_IRQPOLn(_n1) (_n1) #define HW_PINCTRL_IRQPOLn_SET(_n1) HW(PINCTRL_IRQPOLn_SET(_n1)) #define HWA_PINCTRL_IRQPOLn_SET(_n1) (HWA_PINCTRL_IRQPOLn(_n1) + 0x4) #define HWT_PINCTRL_IRQPOLn_SET(_n1) HWIO_32_WO #define HWN_PINCTRL_IRQPOLn_SET(_n1) PINCTRL_IRQPOLn #define HWI_PINCTRL_IRQPOLn_SET(_n1) (_n1) #define HW_PINCTRL_IRQPOLn_CLR(_n1) HW(PINCTRL_IRQPOLn_CLR(_n1)) #define HWA_PINCTRL_IRQPOLn_CLR(_n1) (HWA_PINCTRL_IRQPOLn(_n1) + 0x8) #define HWT_PINCTRL_IRQPOLn_CLR(_n1) HWIO_32_WO #define HWN_PINCTRL_IRQPOLn_CLR(_n1) PINCTRL_IRQPOLn #define HWI_PINCTRL_IRQPOLn_CLR(_n1) (_n1) #define HW_PINCTRL_IRQPOLn_TOG(_n1) HW(PINCTRL_IRQPOLn_TOG(_n1)) #define HWA_PINCTRL_IRQPOLn_TOG(_n1) (HWA_PINCTRL_IRQPOLn(_n1) + 0xc) #define HWT_PINCTRL_IRQPOLn_TOG(_n1) HWIO_32_WO #define HWN_PINCTRL_IRQPOLn_TOG(_n1) PINCTRL_IRQPOLn #define HWI_PINCTRL_IRQPOLn_TOG(_n1) (_n1) #define BP_PINCTRL_IRQPOLn_BITS 0 #define BM_PINCTRL_IRQPOLn_BITS 0xffffffff #define BF_PINCTRL_IRQPOLn_BITS(v) (((v) & 0xffffffff) << 0) #define BFM_PINCTRL_IRQPOLn_BITS(v) BM_PINCTRL_IRQPOLn_BITS #define BF_PINCTRL_IRQPOLn_BITS_V(e) BF_PINCTRL_IRQPOLn_BITS(BV_PINCTRL_IRQPOLn_BITS__##e) #define BFM_PINCTRL_IRQPOLn_BITS_V(v) BM_PINCTRL_IRQPOLn_BITS #define HW_PINCTRL_IRQSTATn(_n1) HW(PINCTRL_IRQSTATn(_n1)) #define HWA_PINCTRL_IRQSTATn(_n1) (0x80018000 + 0xc0 + (_n1) * 0x100) #define HWT_PINCTRL_IRQSTATn(_n1) HWIO_32_RW #define HWN_PINCTRL_IRQSTATn(_n1) PINCTRL_IRQSTATn #define HWI_PINCTRL_IRQSTATn(_n1) (_n1) #define HW_PINCTRL_IRQSTATn_SET(_n1) HW(PINCTRL_IRQSTATn_SET(_n1)) #define HWA_PINCTRL_IRQSTATn_SET(_n1) (HWA_PINCTRL_IRQSTATn(_n1) + 0x4) #define HWT_PINCTRL_IRQSTATn_SET(_n1) HWIO_32_WO #define HWN_PINCTRL_IRQSTATn_SET(_n1) PINCTRL_IRQSTATn #define HWI_PINCTRL_IRQSTATn_SET(_n1) (_n1) #define HW_PINCTRL_IRQSTATn_CLR(_n1) HW(PINCTRL_IRQSTATn_CLR(_n1)) #define HWA_PINCTRL_IRQSTATn_CLR(_n1) (HWA_PINCTRL_IRQSTATn(_n1) + 0x8) #define HWT_PINCTRL_IRQSTATn_CLR(_n1) HWIO_32_WO #define HWN_PINCTRL_IRQSTATn_CLR(_n1) PINCTRL_IRQSTATn #define HWI_PINCTRL_IRQSTATn_CLR(_n1) (_n1) #define HW_PINCTRL_IRQSTATn_TOG(_n1) HW(PINCTRL_IRQSTATn_TOG(_n1)) #define HWA_PINCTRL_IRQSTATn_TOG(_n1) (HWA_PINCTRL_IRQSTATn(_n1) + 0xc) #define HWT_PINCTRL_IRQSTATn_TOG(_n1) HWIO_32_WO #define HWN_PINCTRL_IRQSTATn_TOG(_n1) PINCTRL_IRQSTATn #define HWI_PINCTRL_IRQSTATn_TOG(_n1) (_n1) #define BP_PINCTRL_IRQSTATn_BITS 0 #define BM_PINCTRL_IRQSTATn_BITS 0xffffffff #define BF_PINCTRL_IRQSTATn_BITS(v) (((v) & 0xffffffff) << 0) #define BFM_PINCTRL_IRQSTATn_BITS(v) BM_PINCTRL_IRQSTATn_BITS #define BF_PINCTRL_IRQSTATn_BITS_V(e) BF_PINCTRL_IRQSTATn_BITS(BV_PINCTRL_IRQSTATn_BITS__##e) #define BFM_PINCTRL_IRQSTATn_BITS_V(v) BM_PINCTRL_IRQSTATn_BITS #endif /* __HEADERGEN_STMP3600_PINCTRL_H__*/