Thomas Martitz
991ae1e395
Create fimrware/asm directory for assembly optimized stuff.
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This dir is suitable for stuff that doesn't fit the target tree, e.g. because
it also builds on hosted or otherwise. It also has a generic subfolder for
fallback C implementations so that not all archs need to provide asm files.
SOURCES should only contain "foo.c" where foo.c includes the specific
<arch>/foo.c files from the subdirs using the preprocessor. This way automatic
selection of asm versions or generic C verion is possible.
For the start, the thread support files are moved, since ASM threads can
be used on hosted platforms as well. Since core_sleep() remains platform
specific it's moved to the corresponding system.h headers.
Change-Id: Iebff272f3407a6eaafeb7656ceb0ae9eca3f7cb9
2012-01-22 18:46:44 +01:00
Michael Sevakis
6a67707b5e
Commit to certain names for cache coherency APIs and discard the aliases.
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Wouldn't surprise me a bit to get some non-green.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31339 a1c6a512-1295-4272-9138-f99709370657
2011-12-17 07:27:24 +00:00
Michael Sevakis
9f0bad0efe
Byteswap routines don't really need 'asm volatile', just 'asm' since it should be safe to move them for optimizing. Clean up the line endings for ARM.
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29394 a1c6a512-1295-4272-9138-f99709370657
2011-02-25 00:46:39 +00:00
Michael Sevakis
18770dac2e
Use __builtin_constant_p() to select the best byteswapping method: constant or target optimized. Same macro can then be used for constant values and inits as well as non-constant.
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29171 a1c6a512-1295-4272-9138-f99709370657
2011-01-30 00:58:45 +00:00
Andrew Mahone
c76d940c06
Replace 1UL in BIT_N with 1U to avoid turning it into a 64-bit operation on 64-bit sim targets.
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21197 a1c6a512-1295-4272-9138-f99709370657
2009-06-06 00:58:57 +00:00
Andrew Mahone
de7c5711c5
Add a system-wide BIT_N macro, implemented via an LUT on SH, and use it in the TAGCACHE_IS_* macros in place of per-set LUTs, removing duplication of data between those LUTs and the mask values used on other targets.
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21195 a1c6a512-1295-4272-9138-f99709370657
2009-06-06 00:00:58 +00:00
Michael Sevakis
21f0c9a282
Make basic cache functions into calls, and get rid of CACHE_FUNCTION_WRAPPERS and CACHE_FUNCTIONS_AS_CALL macros. Rename flush/invalidate_icache to cpucache_flush/invalidate. They're inlined only if an implementation isn't provided by defining HAVE_CPUCACHE_FLUSH/INVALIDATE.
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19971 a1c6a512-1295-4272-9138-f99709370657
2009-02-11 12:55:51 +00:00
Daniel Stenberg
2acc0ac542
Updated our source code header to explicitly mention that we are GPL v2 or
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later. We still need to hunt down snippets used that are not. 1324 modified
files...
http://www.rockbox.org/mail/archive/rockbox-dev-archive-2008-06/0060.shtml
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17847 a1c6a512-1295-4272-9138-f99709370657
2008-06-28 18:10:04 +00:00
Michael Sevakis
af395f4db6
Do core interrupt masking in a less general fashion and save some instructions to decrease size and speed things up a little bit. Small fix to a few places where interrupts would get enabled again where they shouldn't have been (context switching calls when disabled).
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16811 a1c6a512-1295-4272-9138-f99709370657
2008-03-26 01:50:41 +00:00
Jens Arnold
36ba4b02bd
A bit of clarification of code origin. No code change.
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13173 a1c6a512-1295-4272-9138-f99709370657
2007-04-15 22:52:42 +00:00
Jens Arnold
4c151dcb21
Oops, forgot to commit 2 new files...
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13115 a1c6a512-1295-4272-9138-f99709370657
2007-04-11 23:54:34 +00:00
