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Author SHA1 Message Date
Thomas Martitz
5783505b99 Add two macros for char*-based pointer arithmetic and use it in font.c 
This fixes errornous pointer addition (+ on a short*), which crashed in some situation.
Fixes FS#12317 and should hopefully get the clips booting again.

Thanks to Jonathan Gordon for spotting the bad pointer arithmetic.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30724 a1c6a512-1295-4272-9138-f99709370657
 2011-10-07 19:29:18 +00:00
Thomas Martitz
bb000ce525 Fix last yellows. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30385 a1c6a512-1295-4272-9138-f99709370657
 2011-08-30 14:38:16 +00:00
Michael Sevakis
7ad2cad173 Commit work started in FS#12153 to put timing/position information in PCM 
buffer chunks.

* Samples and position indication is closely associated with audio data
  instead of compensating by a latency constant. Alleviates problems with
  using the elapsed as a track indicator where it could be off by several
  steps.

* Timing is accurate throughout track even if resampling for pitch shift,
  whereas before it updated during transition latency at the normal 1:1 rate.

* Simpler PCM buffer with a constant chunk size, no linked lists.

In converting crossfade, a minor change was made to not change the WPS until
the fade-in of the incoming track, whereas before it would change upon the
start of the fade-out of the outgoing track possibly having the WPS change
with far too much lead time.

Codec changes are to set elapsed times *before* writing next PCM frame because
 time and position data last set are saved in the next committed PCM chunk. 


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30366 a1c6a512-1295-4272-9138-f99709370657
 2011-08-28 07:45:35 +00:00
Thomas Martitz
dbdbc242ac Remove hosted_get_volume(), as event data is available in button_get_data(). 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30300 a1c6a512-1295-4272-9138-f99709370657
 2011-08-14 13:38:10 +00:00
Thomas Martitz
d43e8ea5a2 Slightly more typesafe ALIGN_DOWN/UP macros. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30004 a1c6a512-1295-4272-9138-f99709370657
 2011-06-14 14:21:43 +00:00
Dominik Riebeling
1aadfb2229 Android: ignore swap16 and swap32 from NDK. 
The NDK includes swap16 and swap32 macros, Rockbox as well. Use the Rockbox
ones and avoid a macro redefined warning.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29939 a1c6a512-1295-4272-9138-f99709370657
 2011-05-31 21:16:17 +00:00
Björn Stenberg
e50cc0e3d7 Listen to and follow external Android volume changes. (Based on FS#11914 by Maurus Cuelenaere) 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29586 a1c6a512-1295-4272-9138-f99709370657
 2011-03-14 12:25:48 +00:00
Michael Sevakis
0d902c8c54 Buffering should align itself and not rely on buffering_reset parameters when storage alignment matters so that wrapped reads maintain alignment. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29258 a1c6a512-1295-4272-9138-f99709370657
 2011-02-09 09:30:09 +00:00
Karl Kurbjun
8e8f700842 Add ARMv4 16-bit(set, mod, clr) operations used on DM320. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29221 a1c6a512-1295-4272-9138-f99709370657
 2011-02-06 19:43:45 +00:00
Michael Sevakis
18770dac2e Use __builtin_constant_p() to select the best byteswapping method: constant or target optimized. Same macro can then be used for constant values and inits as well as non-constant. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29171 a1c6a512-1295-4272-9138-f99709370657
 2011-01-30 00:58:45 +00:00
Andree Buschmann
6695226331 Fix typo in comment. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28641 a1c6a512-1295-4272-9138-f99709370657
 2010-11-22 18:43:22 +00:00
Andree Buschmann
eef21cb18a Change alignment macros to allow further performance optimization. Define the CACHEALIGN macros for all ARM CPUs, the used alignment size is derived from CACHEALIGN_BITS which has been defined for each supported ARM CPU with r28619. The default alignment size for ARM is set to 32 bytes as new -- not yet supported -- ARM CPUs will most probably need this alignment. To be able to differ between ARM and other CPUs a new macro called MEM_ALIGN_ATTR is introduced. This equals CACHEALIGN_ATTR for ARM, 16 byte alignment for Coldfire and is kept empty for other CPUs. MEM_ALIGN_ATTR is available system wide. From measurements it is expected that the usage of MEM_ALIGN_ATTR can give significant performance gain on ARM11 CPUs. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28625 a1c6a512-1295-4272-9138-f99709370657
 2010-11-21 12:27:01 +00:00
Thomas Martitz
dd5dd8cfd9 Rename cache coherency functions. 
The old cache coherency function names where wrong and misleading.
The new names are (purposely different from vendor manuals)
*  commit_* (write-back only)
*  discard_* (removing lines from cache only)
*  commit_discard_* (write-back and removing lines from cache)

It's suspected the old names have led to wrong uses. The old names still exist
(as aliases) so every call via the old names need to be double checked and changed
to the new name.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28045 a1c6a512-1295-4272-9138-f99709370657
 2010-09-08 17:05:49 +00:00
Rafaël Carré
a72aa856bd Move some gcc extensions to new gcc_extensions.h header 
- Move ATTRIBUTE_PRINTF/ATTRIBUTE_SCANF from _ansi.h
  They are not related at all to this file, and this broke compilation
  with Code Sourcery GCC which ships its own _ansi.h
- Move LIKELY/UNLIKELY from system.h

There is likely a lot more GCC extensions used everywhere in the source,
conditionally on __GNUC__ or unconditionally

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27548 a1c6a512-1295-4272-9138-f99709370657
 2010-07-25 14:44:29 +00:00
Nils Wallménius
6d732a32bc Don't duplicate byteswap code. Invent system where NEED_GENERIC_BYTESWAPS is set if the generic functions from system.h are needed. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27440 a1c6a512-1295-4272-9138-f99709370657
 2010-07-15 22:01:06 +00:00
Michael Sevakis
e286b0bbc0 Remove atomic register bit manipulation functions from i.MX and s3c target code and introduce generic functions for ARM (bitmod32, bitset32, and bitclr32). Multiprocessor support is possible but just not implemented at the moment, only interrupt lockout. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27188 a1c6a512-1295-4272-9138-f99709370657
 2010-06-30 02:02:46 +00:00
Rafaël Carré
2494afccc4 playback.c: don't assume cacheline size is 16 bytes 
ideally all targets should define CACHEALIGN_BITS, for now we default it
to 16 bytes if it's not specified

Since the buffer is already aligned in playback.c no need to align it
again in buffering.c

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27073 a1c6a512-1295-4272-9138-f99709370657
 2010-06-23 04:34:18 +00:00
Thomas Martitz
35e8b1429a Rockbox as an application: Replace many occurences of #ifdef SIMULATOR with #if (CONFIG_PLATFORM & PLATFORM_HOSTED) (or equivalently). 
The simulator defines PLATFORM_HOSTED, as RaaA will do (RaaA will not define SIMULATOR).
The new define is to (de-)select code to compile on hosted platforms generally.

Should be no functional change to targets or the simulator.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27019 a1c6a512-1295-4272-9138-f99709370657
 2010-06-21 16:53:00 +00:00
Michael Sparmann
43fa52aaca Also define STORAGE_ALIGN_ATTR if STORAGE_WANTS_ALIGN isn't defined 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26984 a1c6a512-1295-4272-9138-f99709370657
 2010-06-20 12:34:08 +00:00
Michael Sparmann
3b97fbd91e Add a STORAGE_ALIGN_ATTR macro, similar to CACHEALIGN_ATTR, for consistency 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26982 a1c6a512-1295-4272-9138-f99709370657
 2010-06-20 12:23:57 +00:00
Thomas Martitz
b6c3bc1cc9 Get checkwps going again, don't mess with sdl in it. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26066 a1c6a512-1295-4272-9138-f99709370657
 2010-05-15 21:11:20 +00:00
Thomas Martitz
3d0cee8abb - Move uisimulator/sdl/*.[ch] into the target tree, under firmware/target/hosted/sdl, uisdl.c is split up across button-sdl.c and system-sdl.c. 
- Refactor the program startup. main() is now in main.c like on target, and the implicit application thread will now act as our main thread (previously a separate one was created for this in thread initialization).

This is part of Rockbox as an application and is the first step to make an application port from the uisimulator. In a further step the sim bits from the sdl build will be separated out.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26065 a1c6a512-1295-4272-9138-f99709370657
 2010-05-15 21:02:47 +00:00
Michael Sevakis
d665c92652 Cache align the pitch detector audiobuffer where needed. Some other misc. changes to try to make sure everything builds. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26011 a1c6a512-1295-4272-9138-f99709370657
 2010-05-14 08:44:07 +00:00
Michael Sevakis
11cca264ff i.MX31/Gigabeat S: Implement frequency and voltage scaling-- 1.6V for 528MHz, and 1.35V for 264MHz and 132MHz. Keep DPTC overdrive ( > 400MHz) voltage scaling off for now because of uncertainties. Simplify the (working) mess later. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25699 a1c6a512-1295-4272-9138-f99709370657
 2010-04-23 15:32:50 +00:00
Rafaël Carré
b6065a8ceb Use STORAGE_WANTS_ALIGN to make clear it's not a strict necessity 
Define PROC_NEEDS_CACHEALIGN only for PP

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25339 a1c6a512-1295-4272-9138-f99709370657
 2010-03-26 00:11:50 +00:00
Rafaël Carré
2109a0278c Accept expressions in CACHE_OVERLAP() macro 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25337 a1c6a512-1295-4272-9138-f99709370657
 2010-03-25 23:03:42 +00:00
Rafaël Carré
a8d1690ffe Make storage alignement use cache alignement macros 
Introduce STORAGE_ALIGN_DOWN, STORAGE_PAD (using new CACHE_PAD) and
STORAGE_OVERLAP (using new CACHE_OVERLAP), make them useful only when
PROC_NEEDS_CACHEALIGN and STORAGE_NEEDS_ALIGN are defined

Modify PP and nano2g system-target.h accordingly

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25336 a1c6a512-1295-4272-9138-f99709370657
 2010-03-25 23:01:56 +00:00
Nils Wallménius
aa32e55ce7 Remove unneeded instruction from the coldfire ffs function and fix a wrong comment 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24030 a1c6a512-1295-4272-9138-f99709370657
 2009-12-16 16:39:24 +00:00
Nils Wallménius
d1a9e0c588 fix checkwps breakage caused by r229900 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22993 a1c6a512-1295-4272-9138-f99709370657
 2009-10-06 22:02:06 +00:00
Nils Wallménius
dcc49194ac Once again fix building of the database tool that gets broke over and over 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22990 a1c6a512-1295-4272-9138-f99709370657
 2009-10-06 21:08:59 +00:00
Björn Stenberg
ffaf24674d Fixed checkwps build warnings. Updated checkwps makefile to be closer to main. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22593 a1c6a512-1295-4272-9138-f99709370657
 2009-09-01 14:53:37 +00:00
Andrew Mahone
c76d940c06 Replace 1UL in BIT_N with 1U to avoid turning it into a 64-bit operation on 64-bit sim targets. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21197 a1c6a512-1295-4272-9138-f99709370657
 2009-06-06 00:58:57 +00:00
Andrew Mahone
d2eb5d2901 Fix undefined BIT_N on non-SH targets. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21196 a1c6a512-1295-4272-9138-f99709370657
 2009-06-06 00:11:41 +00:00
Andrew Mahone
de7c5711c5 Add a system-wide BIT_N macro, implemented via an LUT on SH, and use it in the TAGCACHE_IS_* macros in place of per-set LUTs, removing duplication of data between those LUTs and the mask values used on other targets. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21195 a1c6a512-1295-4272-9138-f99709370657
 2009-06-06 00:00:58 +00:00
Michael Sevakis
21f0c9a282 Make basic cache functions into calls, and get rid of CACHE_FUNCTION_WRAPPERS and CACHE_FUNCTIONS_AS_CALL macros. Rename flush/invalidate_icache to cpucache_flush/invalidate. They're inlined only if an implementation isn't provided by defining HAVE_CPUCACHE_FLUSH/INVALIDATE. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19971 a1c6a512-1295-4272-9138-f99709370657
 2009-02-11 12:55:51 +00:00
Nils Wallménius
259116cefc Accept FS#9717 by Akio Idehara with a small change suggested by Rafaël Carré avoiding simulator warnings about redefining endianness switching macros 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19843 a1c6a512-1295-4272-9138-f99709370657
 2009-01-24 10:16:22 +00:00
Andrew Mahone
2fbf09752d remove align_buffer from firmare/general.c, replacing with ALIGN_BUFFER macro, and replace all uses of it (only resize.c in core, and pictureflow and mpegplayer plugins), remove it from plugin_api, 
and remove wrapper for it from plugin.h


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19758 a1c6a512-1295-4272-9138-f99709370657
 2009-01-13 13:48:26 +00:00
Michael Sevakis
4ed78f5c72 Clean up panicf and introduce system_exception_wait to do further target tasks and wait for a button when an unrecoverable error has occurred (panic, UIE, etc.). Returning from that function should reboot or don't return from it. Move UIE and __div0 for ARM to its own file. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19716 a1c6a512-1295-4272-9138-f99709370657
 2009-01-08 10:15:32 +00:00
Nils Wallménius
95cf600b6c Macros should be ALL CAPS, so rename (un)likely() to (UN)LIKELY() 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19181 a1c6a512-1295-4272-9138-f99709370657
 2008-11-22 16:56:20 +00:00
Nils Wallménius
1284c127f8 Introduce likely() and unlikely() macros, use to give gcc hints about which branch is likely to be taken in a conditional, use them in the midi player for a small speedup, use instead of similar EXPECT macros in tremor and use in mpegplayer 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19162 a1c6a512-1295-4272-9138-f99709370657
 2008-11-20 20:20:43 +00:00
Daniel Stenberg
2acc0ac542 Updated our source code header to explicitly mention that we are GPL v2 or 
later. We still need to hunt down snippets used that are not. 1324 modified
files...
http://www.rockbox.org/mail/archive/rockbox-dev-archive-2008-06/0060.shtml


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17847 a1c6a512-1295-4272-9138-f99709370657
 2008-06-28 18:10:04 +00:00
Marcoen Hirschberg
1d04485789 remove leftover debug stuff 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17820 a1c6a512-1295-4272-9138-f99709370657
 2008-06-27 23:44:17 +00:00
Marcoen Hirschberg
7b10ef9a7c initial Meizu M6SL port (take 2) 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17819 a1c6a512-1295-4272-9138-f99709370657
 2008-06-27 23:24:34 +00:00
Michael Sevakis
27cf677339 Add a complete priority inheritance implementation to the scheduler (all mutex ownership and queue_send calls are inheritable). Priorities are differential so that dispatch depends on the runnable range of priorities. Codec priority can therefore be raised in small steps (pcmbuf updated to enable). Simplify the kernel functions to ease implementation and use the same kernel.c for both sim and target (I'm tired of maintaining two ;_). 1) Not sure if a minor audio break at first buffering issue will exist on large-sector disks (the main mutex speed issue was genuinely resolved earlier). At this point it's best dealt with at the buffering level. It seems a larger filechunk could be used again. 2) Perhaps 64-bit sims will have some minor issues (finicky) but a backroll of the code of concern there is a 5-minute job. All kernel objects become incompatible so a full rebuild and update is needed. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16791 a1c6a512-1295-4272-9138-f99709370657
 2008-03-25 02:34:12 +00:00
Michael Sevakis
a222f27c4a mpegplayer: Make playback engine fully seekable and frame-accurate and split into logical parts. Be sure to have all current features work. Actual UI for seeking will be added soon. Recommended GOP size is about 15-30 frames depending on target or seeking can be slow with really long GOPs (nature of MPEG video). More refined encoding recommendations for a particular player should be posted soon. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15977 a1c6a512-1295-4272-9138-f99709370657
 2007-12-29 19:46:35 +00:00
Michael Sevakis
57d71e4267 Add some CACHEALIGN_* macros and a helper function to assist in aligning data and buffers on PortalPlayer processors to cache line boundaries. They're noops when PROC_NEED_CACHEALIGN isn't defined. Go safe and increase the value to 32 since I'm not sure yet if 16 is sufficient - changing that is a one-liner. Add helper to plugin API which will be needed shortly. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15523 a1c6a512-1295-4272-9138-f99709370657
 2007-11-08 05:17:20 +00:00
Michael Sevakis
a9b2fb5ee3 Finally full multicore support for PortalPlayer 502x targets with an eye towards the possibility of other types. All SVN targets the low-lag code to speed up blocking operations. Most files are modified here simple due to a name change to actually support a real event object and a param change to create_thread. Add some use of new features but just sit on things for a bit and leave full integration for later. Work will continue on to address size on sensitive targets and simplify things if possible. Any PP target having problems with SWP can easily be changed to sw corelocks with one #define change in config.h though only PP5020 has shown an issue and seems to work without any difficulties. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15134 a1c6a512-1295-4272-9138-f99709370657
 2007-10-16 01:25:17 +00:00
Michael Sevakis
bfb281ff63 Messages queues must be guarded on both ends or else it's a race between detecting a message present and missing a wakeup on thread about to wait. Keeping IRQs from interacting with the scheduler would be preferable but this should do at the moment. Add more detailed panic info regarding blocking violations so we know who. Make panicf function well enough on Gigabeat and PortalPlayer targets. Move the core sleep instructions into a CPU-specific inline to keep thing organized. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13374 a1c6a512-1295-4272-9138-f99709370657
 2007-05-12 05:20:04 +00:00
Michael Sevakis
d95c39072a Portal Player: Add invalidate_icache and flush_icache. Flush the cache on the core for newborn threads. In doing so, move more ARM stuff to the target tree and organize it to make a clean job of it. If anything isn't appropriate for some particular device give a hollar or even just fix it by some added #ifdefing. I was informed that the PP targets are register compatible so I'm going off that advice. The Sansa likes it though. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13144 a1c6a512-1295-4272-9138-f99709370657
 2007-04-13 20:55:48 +00:00
Jens Arnold
8636e6949e Moved SH1 system code to target tree. * First shot at hwcompat cleanup. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13114 a1c6a512-1295-4272-9138-f99709370657
 2007-04-11 23:51:00 +00:00