From a3bf2ec61cc25fce1de89b1a3f60bb575ec292fc Mon Sep 17 00:00:00 2001 From: Dave Chapman Date: Sat, 12 Nov 2005 15:29:43 +0000 Subject: [PATCH] More iPod changes git-svn-id: svn://svn.rockbox.org/rockbox/trunk@7825 a1c6a512-1295-4272-9138-f99709370657 --- firmware/app.lds | 51 +++---------- firmware/crt0.S | 159 +++++++++++++++++++++------------------- firmware/pcm_playback.c | 55 +++++++++++++- firmware/system.c | 5 ++ 4 files changed, 153 insertions(+), 117 deletions(-) diff --git a/firmware/app.lds b/firmware/app.lds index 1a12cb5230..af5cd8d9da 100644 --- a/firmware/app.lds +++ b/firmware/app.lds @@ -10,6 +10,7 @@ INPUT(crt0.o) #elif CONFIG_CPU == PP5020 OUTPUT_FORMAT(elf32-littlearm) OUTPUT_ARCH(arm) +INPUT(crt0.o) #else OUTPUT_FORMAT(elf32-sh) INPUT(crt0.o) @@ -102,44 +103,6 @@ _audiobufend = 0; _pluginbuf = 0; -} -#elif CONFIG_CPU==PP5020 -SECTIONS -{ - . = 0x10000000; - - .text : { - *(.init.text) - *(.text) - } - - __data_start__ = . ; - .data : { *(.data) } - __data_end__ = . ; - - __stack_start__ = .; - .stack : - { - *(.stack) - _stackbegin = .; - stackbegin = .; - . += 0x2000; - _stackend = .; - stackend = .; - } - - /* The bss section is too large for IRAM - we just move it at the - end of the regular RAM. */ - - . = 0x11c00000; - __bss_start__ = .; - .bss : { - *(.bss); - __bss_end__ = . ; - } - - - } #else @@ -159,6 +122,10 @@ SECTIONS #define DRAMORIG 0x31000000 + STUBOFFSET #define IRAMORIG 0x10000000 #define IRAMSIZE 0xc000 +#elif CONFIG_CPU==PP5020 +#define DRAMORIG 0x10000000 + STUBOFFSET +#define IRAMORIG 0x40000000 +#define IRAMSIZE 0xc000 #else #define DRAMORIG 0x09000000 + STUBOFFSET #define IRAMORIG 0x0f000000 @@ -194,6 +161,10 @@ SECTIONS . = ALIGN(0x200); *(.init.text) *(.text*) +#if CONFIG_CPU==PP5020 + *(.glue_7) + *(.glue_7t) +#endif . = ALIGN(0x4); } > DRAM @@ -243,7 +214,7 @@ SECTIONS _iend = .; } > IRAM -#ifdef CPU_COLDFIRE +#if defined(CPU_COLDFIRE) || CONFIG_CPU==PP5020 .stack : { *(.stack) @@ -263,7 +234,7 @@ SECTIONS } > DRAM #endif -#ifdef CPU_COLDFIRE +#if defined(CPU_COLDFIRE) || CONFIG_CPU==PP5020 .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram): #else .bss : diff --git a/firmware/crt0.S b/firmware/crt0.S index 54d16bbe93..d5cef352b5 100644 --- a/firmware/crt0.S +++ b/firmware/crt0.S @@ -20,7 +20,7 @@ #include "cpu.h" #if (CONFIG_CPU == PP5002) || (CONFIG_CPU == PP5020) - .section .init.text + .section .init.text,"ax",%progbits #else .section .init.text,"ax",@progbits #endif @@ -34,119 +34,126 @@ start: * Copyright (c) 2005, Bernard Leach * */ - .equ PP5002_PROC_ID, 0xc4000000 - .equ PP5002COP_CTRL, 0xcf004058 - .equ PP5020_PROC_ID, 0x60000000 - .equ PP5020_COP_CTRL, 0x60007004 + .equ PP5002_PROC_ID, 0xc4000000 + .equ PP5002COP_CTRL, 0xcf004058 + .equ PP5020_PROC_ID, 0x60000000 + .equ PP5020_COP_CTRL, 0x60007004 start: - /* get the high part of our execute address */ - ldr r0, =0xff000000 - and r8, pc, r0 @ r8 is used later + /* get the high part of our execute address */ + ldr r0, =0xff000000 + and r8, pc, r0 @ r8 is used later + +#ifdef BOOTLOADER #if CONFIG_CPU==PP5002 - mov r0, #PP5002_PROC_ID + mov r0, #PP5002_PROC_ID #else - mov r0, #PP5020_PROC_ID + mov r0, #PP5020_PROC_ID #endif - ldr r0, [r0] - and r0, r0, #0xff - cmp r0, #0x55 - beq 1f + ldr r0, [r0] + and r0, r0, #0xff + cmp r0, #0x55 + beq 1f - /* put us (co-processor) to sleep */ + /* put us (co-processor) to sleep */ #if CONFIG_CPU==PP5002 - ldr r4, =PP5002_COP_CTRL - mov r3, #0xca + ldr r4, =PP5002_COP_CTRL + mov r3, #0xca #else - ldr r4, =PP5020_COP_CTRL - mov r3, #0x80000000 + ldr r4, =PP5020_COP_CTRL + mov r3, #0x80000000 #endif - str r3, [r4] + str r3, [r4] - ldr pc, =cop_wake_start + + ldr pc, =cop_wake_start cop_wake_start: - /* jump the COP to startup */ - ldr r0, =startup_loc - ldr pc, [r0] + /* jump the COP to startup */ + ldr r0, =startup_loc + ldr pc, [r0] 1: - /* setup some stack */ - ldr sp, = _stackbegin + /* setup some stack */ + ldr sp, = _stackbegin - /* get the high part of our execute address */ - ldr r2, =0xffffff00 - and r4, pc, r2 + /* get the high part of our execute address */ + ldr r2, =0xffffff00 + and r4, pc, r2 - /* Copy bootloader to safe area - 0x40000000 */ - mov r5, #0x40000000 - ldr r6, = _dataend - sub r0, r6, r5 /* length of loader */ - add r0, r4, r0 /* r0 points to start of loader */ + /* Copy bootloader to safe area - 0x40000000 */ + mov r5, #0x40000000 + ldr r6, = _dataend + sub r0, r6, r5 /* length of loader */ + add r0, r4, r0 /* r0 points to start of loader */ 1: - cmp r5, r6 - ldrcc r2, [r4], #4 - strcc r2, [r5], #4 - bcc 1b - - ldr pc, =start_loc /* jump to the relocated start_loc: */ + cmp r5, r6 + ldrcc r2, [r4], #4 + strcc r2, [r5], #4 + bcc 1b + ldr pc, =start_loc /* jump to the relocated start_loc: */ + start_loc: - /* Initialise bss section to zero */ - ldr r3, =_bssstart - ldr r1, =_bssend - mov r2, #0x0 + /* Initialise bss section to zero */ + ldr r3, =_bssstart + ldr r1, =_bssend + mov r2, #0x0 1: - cmp r3, r1 - strcc r2, [r3], #4 - bcc 1b + cmp r3, r1 + strcc r2, [r3], #4 + bcc 1b - /* execute the loader - this will load an image to 0x10000000 */ - bl main + /* execute the loader - this will load an image to 0x10000000 */ + bl main - /* save the startup address for the COP */ - ldr r1, =startup_loc - str r0, [r1] + /* save the startup address for the COP */ + ldr r1, =startup_loc + str r0, [r1] #if CONFIG_CPU==PP5002 - /* make sure COP is sleeping */ - ldr r4, =0xcf004050 + /* make sure COP is sleeping */ + ldr r4, =0xcf004050 1: - ldr r3, [r4] - ands r3, r3, #0x4000 - beq 1b + ldr r3, [r4] + ands r3, r3, #0x4000 + beq 1b - /* wake up COP */ - ldr r4, =PP5002_COP_CTRL - mov r3, #0xce - strh r3, [r4] + /* wake up COP */ + ldr r4, =PP5002_COP_CTRL + mov r3, #0xce + strh r3, [r4] #else - /* make sure COP is sleeping */ - ldr r4, =PP5020_COP_CTRL + /* make sure COP is sleeping */ + ldr r4, =PP5020_COP_CTRL 1: - ldr r3, [r4] - ands r3, r3, #0x80000000 - beq 1b + ldr r3, [r4] + ands r3, r3, #0x80000000 + beq 1b - /* wake up COP */ - @ ldr r4, =PP5020_COP_CTRL - mov r3, #0x0 - str r3, [r4] + /* wake up COP */ + @ ldr r4, =PP5020_COP_CTRL + mov r3, #0x0 + str r3, [r4] #endif - /* jump to start location */ - mov pc, r0 + /* jump to start location */ + mov pc, r0 startup_loc: - .word 0x0 + .word 0x0 -.align 8 /* starts at 0x100 */ +.align 8 /* starts at 0x100 */ .global boot_table boot_table: - /* here comes the boot table, don't move its offset */ - .space 400 + /* here comes the boot table, don't move its offset */ + .space 400 +#else + /* TODO: Implement startup code */ + +#endif /* BOOTLOADER (iPod) */ #elif CONFIG_CPU == TCC730 /* Platform: Gmini 120/SP */ diff --git a/firmware/pcm_playback.c b/firmware/pcm_playback.c index 21c4bf8c04..05c5447ff8 100644 --- a/firmware/pcm_playback.c +++ b/firmware/pcm_playback.c @@ -329,4 +329,57 @@ void pcm_init(void) dma_stop(); } -#endif /* HAVE_UDA1380 */ +#elif defined(HAVE_WM8975) + +/* TODO: Implement for iPod - we should probably move the UDA1380 and + WM8975 specific code into separate files. + + For now, just implement some dummy functions. +*/ + +void pcm_init(void) +{ + +} + +void pcm_set_frequency(unsigned int frequency) +{ + (void)frequency; +} + +void pcm_play_data(void (*get_more)(unsigned char** start, long* size)) +{ + (void)get_more; +} + +void pcm_play_stop(void) +{ +} + +void pcm_play_pause(bool play) +{ + (void)play; +} + +bool pcm_is_paused(void) +{ + return false; +} + +bool pcm_is_playing(void) +{ + return false; +} + +void pcm_calculate_peaks(int *left, int *right) +{ + (void)left; + (void)right; +} + +long pcm_get_bytes_waiting(void) +{ + return 0; +} + +#endif diff --git a/firmware/system.c b/firmware/system.c index cf8d180940..5e8a7cd4d7 100644 --- a/firmware/system.c +++ b/firmware/system.c @@ -1116,6 +1116,11 @@ void system_reboot(void) { } +int system_memory_guard(int newmode) +{ + (void)newmode; + return 0; +} #endif /* CONFIG_CPU */