Gmini i2c support
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5655 a1c6a512-1295-4272-9138-f99709370657
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2 changed files with 31 additions and 2 deletions
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@ -17,13 +17,34 @@
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*
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*
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****************************************************************************/
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****************************************************************************/
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#include "lcd.h"
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#include "lcd.h"
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#include "sh7034.h"
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#include "cpu.h"
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#include "kernel.h"
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#include "kernel.h"
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#include "thread.h"
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#include "thread.h"
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#include "debug.h"
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#include "debug.h"
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#include "system.h"
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#include "system.h"
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/* cute little functions, atomic read-modify-write */
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/* cute little functions, atomic read-modify-write */
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#ifdef HAVE_GMINI_I2C
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/* This is done like this in the Archos' firmware.
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* However, the TCC370 has an integrated I2C
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* controller (bound to the same lines). It should be
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* possible to use it and thus save some space in flash.
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*/
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#define SDA_LO (P3 &= ~0x20)
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#define SDA_HI (P3 |= 0x20)
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#define SDA_INPUT (P3CONH &= ~0x0C)
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#define SDA_OUTPUT (P3CONH |= 0x04)
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#define SDA (P3 & 0x20)
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#define SCL_LO (P3 &= ~0x10)
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#define SCL_HI (P3 |= 0x10)
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#define SCL_INPUT (P3CONH &= ~0x03)
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#define SCL_OUTPUT (P3CONH |= 0x01)
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#define SCL (P3 & 0x10)
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#else
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/* SDA is PB7 */
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/* SDA is PB7 */
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#define SDA_LO and_b(~0x80, &PBDRL)
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#define SDA_LO and_b(~0x80, &PBDRL)
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#define SDA_HI or_b(0x80, &PBDRL)
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#define SDA_HI or_b(0x80, &PBDRL)
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@ -46,6 +67,7 @@
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#define SCL_HI or_b(0x20, &PBDRH)
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#define SCL_HI or_b(0x20, &PBDRH)
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#define SCL (PBDR & 0x2000)
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#define SCL (PBDR & 0x2000)
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#endif
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#endif
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#endif
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/* arbitrary delay loop */
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/* arbitrary delay loop */
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#define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0)
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#define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0)
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@ -84,6 +106,10 @@ void i2c_init(void)
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{
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{
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int i;
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int i;
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#ifdef HAVE_GMINI_I2C
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SCL_INPUT;
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SDA_INPUT;
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#else
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#ifdef HAVE_ONDIO_I2C
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#ifdef HAVE_ONDIO_I2C
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/* make PB5, PB6 & PB7 general I/O */
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/* make PB5, PB6 & PB7 general I/O */
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PBCR2 &= ~0xfc00; /* includes PB5, see FIXME below */
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PBCR2 &= ~0xfc00; /* includes PB5, see FIXME below */
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@ -92,12 +118,13 @@ void i2c_init(void)
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PBCR1 &= ~0x0c00; /* PB13 */
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PBCR1 &= ~0x0c00; /* PB13 */
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PBCR2 &= ~0xcc00; /* PB5 and PB7, see FIXME below */
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PBCR2 &= ~0xcc00; /* PB5 and PB7, see FIXME below */
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#endif
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#endif
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/* PB5 is "MAS enable" (no I2C signal!). make it output and high */
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/* PB5 is "MAS enable" (no I2C signal!). make it output and high */
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/* FIXME: this is true only for Players, and should go into mas.c */
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/* FIXME: this is true only for Players, and should go into mas.c */
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/* for Recorders, it shuts off the charger, for FM/V2 it holds power */
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/* for Recorders, it shuts off the charger, for FM/V2 it holds power */
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or_b(0x20, &PBIORL);
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or_b(0x20, &PBIORL);
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or_b(0x20, &PBDRL);
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or_b(0x20, &PBDRL);
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#endif
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SCL_OUTPUT;
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SCL_OUTPUT;
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SDA_OUTPUT;
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SDA_OUTPUT;
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@ -55,6 +55,8 @@
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#define P2CONH MMIO(unsigned char,0x42)
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#define P2CONH MMIO(unsigned char,0x42)
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#define P2CONL MMIO(unsigned char,0x43)
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#define P2CONL MMIO(unsigned char,0x43)
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#define P3CON MMIO(unsigned int,0x44)
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#define P3CON MMIO(unsigned int,0x44)
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#define P3CONH MMIO(unsigned char,0x44)
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#define P3CONL MMIO(unsigned char,0x45)
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#define P3PUR MMIO(unsigned char,0x46)
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#define P3PUR MMIO(unsigned char,0x46)
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#define P5CON MMIO(unsigned char,0x48)
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#define P5CON MMIO(unsigned char,0x48)
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#define P5PUR MMIO(unsigned char,0x49)
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#define P5PUR MMIO(unsigned char,0x49)
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