2005-03-02 23:49:38 +00:00
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#include "rockmacros.h"
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#include "defs.h"
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2005-07-03 14:05:12 +00:00
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#include "cpu-gb.h"
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2005-03-02 23:49:38 +00:00
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#include "hw.h"
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#include "regs.h"
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2005-07-03 14:05:12 +00:00
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#include "lcd-gb.h"
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2005-03-02 23:49:38 +00:00
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#include "mem.h"
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#include "fastmem.h"
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2007-02-06 21:41:08 +00:00
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struct hw hw IBSS_ATTR;
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2005-03-02 23:49:38 +00:00
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/*
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* hw_interrupt changes the virtual interrupt lines included in the
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* specified mask to the values the corresponding bits in i take, and
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* in doing so, raises the appropriate bit of R_IF for any interrupt
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* lines that transition from low to high.
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*/
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void hw_interrupt(byte i, byte mask)
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{
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2007-02-06 21:41:08 +00:00
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byte oldif = R_IF;
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i &= 0x1F & mask;
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R_IF |= i & (hw.ilines ^ i);
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/* FIXME - is this correct? not sure the docs understand... */
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if ((R_IF & (R_IF ^ oldif) & R_IE) && cpu.ime) cpu.halt = 0;
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/* if ((i & (hw.ilines ^ i) & R_IE) && cpu.ime) cpu.halt = 0; */
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/* if ((i & R_IE) && cpu.ime) cpu.halt = 0; */
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hw.ilines &= ~mask;
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hw.ilines |= i;
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2005-03-02 23:49:38 +00:00
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}
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/*
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* hw_dma performs plain old memory-to-oam dma, the original dmg
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* dma. Although on the hardware it takes a good deal of time, the cpu
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* continues running during this mode of dma, so no special tricks to
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* stall the cpu are necessary.
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*/
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void hw_dma(byte b)
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{
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2007-02-06 21:41:08 +00:00
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int i;
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addr a;
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2005-03-02 23:49:38 +00:00
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2007-02-06 21:41:08 +00:00
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a = ((addr)b) << 8;
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for (i = 0; i < 160; i++, a++)
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lcd.oam.mem[i] = readb(a);
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2005-03-02 23:49:38 +00:00
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}
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2007-02-06 21:41:08 +00:00
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void hw_hdma(void)
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2005-03-02 23:49:38 +00:00
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{
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2007-02-06 21:41:08 +00:00
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int cnt;
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addr sa;
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int da;
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sa = ((addr)R_HDMA1 << 8) | (R_HDMA2&0xf0);
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da = 0x8000 | ((int)(R_HDMA3&0x1f) << 8) | (R_HDMA4&0xf0);
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cnt = 16;
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while (cnt--)
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writeb(da++, readb(sa++));
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cpu_timers(16);
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R_HDMA1 = sa >> 8;
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R_HDMA2 = sa & 0xF0;
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R_HDMA3 = 0x1F & (da >> 8);
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R_HDMA4 = da & 0xF0;
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R_HDMA5--;
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hw.hdma--;
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2005-03-02 23:49:38 +00:00
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}
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2007-02-06 21:41:08 +00:00
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void hw_hdma_cmd(byte c)
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2005-03-02 23:49:38 +00:00
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{
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2007-02-06 21:41:08 +00:00
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int cnt;
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addr sa;
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int da;
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/* Begin or cancel HDMA */
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if ((hw.hdma|c) & 0x80)
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{
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hw.hdma = c;
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R_HDMA5 = c & 0x7f;
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if ((R_STAT&0x03) == 0x00) hw_hdma();
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return;
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}
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/* Perform GDMA */
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sa = ((addr)R_HDMA1 << 8) | (R_HDMA2&0xf0);
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da = 0x8000 | ((int)(R_HDMA3&0x1f) << 8) | (R_HDMA4&0xf0);
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cnt = ((int)c)+1;
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/* FIXME - this should use cpu time! */
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/*cpu_timers(102 * cnt);*/
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cpu_timers((460>>cpu.speed)+cnt*16); /*dalias*/
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/*cpu_timers(228 + (16*cnt));*/ /* this should be right according to no$ */
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cnt <<= 4;
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while (cnt--)
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writeb(da++, readb(sa++));
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R_HDMA1 = sa >> 8;
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R_HDMA2 = sa & 0xF0;
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R_HDMA3 = 0x1F & (da >> 8);
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R_HDMA4 = da & 0xF0;
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R_HDMA5 = 0xFF;
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2005-03-02 23:49:38 +00:00
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}
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/*
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* pad_refresh updates the P1 register from the pad states, generating
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* the appropriate interrupts (by quickly raising and lowering the
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* interrupt line) if a transition has been made.
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*/
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void pad_refresh()
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{
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2007-02-06 21:41:08 +00:00
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byte oldp1;
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oldp1 = R_P1;
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R_P1 &= 0x30;
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R_P1 |= 0xc0;
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if (!(R_P1 & 0x10))
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R_P1 |= (hw.pad & 0x0F);
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if (!(R_P1 & 0x20))
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R_P1 |= (hw.pad >> 4);
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R_P1 ^= 0x0F;
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if (oldp1 & ~R_P1 & 0x0F)
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{
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hw_interrupt(IF_PAD, IF_PAD);
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hw_interrupt(0, IF_PAD);
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}
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2005-03-02 23:49:38 +00:00
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}
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/*
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* These simple functions just update the state of a button on the
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* pad.
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*/
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void pad_press(byte k)
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{
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2007-02-06 21:41:08 +00:00
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if (hw.pad & k)
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return;
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hw.pad |= k;
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pad_refresh();
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2005-03-02 23:49:38 +00:00
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}
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void pad_release(byte k)
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{
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2007-02-06 21:41:08 +00:00
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if (!(hw.pad & k))
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return;
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hw.pad &= ~k;
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pad_refresh();
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2005-03-02 23:49:38 +00:00
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}
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void pad_set(byte k, int st)
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{
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2007-02-06 21:41:08 +00:00
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st ? pad_press(k) : pad_release(k);
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2005-03-02 23:49:38 +00:00
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}
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void hw_reset()
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{
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2007-02-06 21:41:08 +00:00
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hw.ilines = hw.pad = 0;
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memset(ram.hi, 0, sizeof ram.hi);
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R_P1 = 0xFF;
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R_LCDC = 0x91;
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R_BGP = 0xFC;
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R_OBP0 = 0xFF;
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R_OBP1 = 0xFF;
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R_SVBK = 0x01;
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R_HDMA5 = 0xFF;
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R_VBK = 0xFE;
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2005-03-02 23:49:38 +00:00
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}
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