2018-06-28 10:24:26 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2016 by Roman Stolyarov
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "system.h"
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#include "kernel.h"
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#include "logf.h"
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#include "audio.h"
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#include "sound.h"
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#include "pcm.h"
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#include "pcm-internal.h"
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#include "cpu.h"
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/****************************************************************************
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** Playback DMA transfer
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**/
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void pcm_play_dma_postinit(void)
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{
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audiohw_postinit();
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/* Flush FIFO */
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__aic_flush_tfifo();
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}
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void pcm_play_dma_init(void)
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{
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system_enable_irq(DMA_IRQ(DMA_AIC_TX_CHANNEL));
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/* Initialize default register values. */
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audiohw_init();
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}
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void pcm_dma_apply_settings(void)
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{
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audiohw_set_frequency(pcm_fsel);
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}
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static const void* playback_address;
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static inline void set_dma(const void *addr, size_t size)
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{
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int burst_size;
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logf("%x %d %x", (unsigned int)addr, size, REG_AIC_SR);
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2020-08-29 01:45:58 +00:00
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commit_discard_dcache_range(addr, size);
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2018-06-28 10:24:26 +00:00
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if(size % 16)
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{
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if(size % 4)
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{
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size /= 2;
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burst_size = DMAC_DCMD_DS_16BIT;
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}
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else
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{
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size /= 4;
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burst_size = DMAC_DCMD_DS_32BIT;
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}
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}
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else
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{
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size /= 16;
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burst_size = DMAC_DCMD_DS_16BYTE;
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}
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REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = 0;
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REG_DMAC_DSAR(DMA_AIC_TX_CHANNEL) = PHYSADDR((unsigned long)addr);
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REG_DMAC_DTAR(DMA_AIC_TX_CHANNEL) = PHYSADDR((unsigned long)AIC_DR);
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REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL) = size;
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REG_DMAC_DRSR(DMA_AIC_TX_CHANNEL) = DMAC_DRSR_RS_AICOUT;
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REG_DMAC_DCMD(DMA_AIC_TX_CHANNEL) = (DMAC_DCMD_SAI | DMAC_DCMD_SWDH_32 | burst_size | DMAC_DCMD_DWDH_16 | DMAC_DCMD_TIE);
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REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = DMAC_DCCSR_NDES | DMAC_DCCSR_EN;
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playback_address = addr;
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}
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static inline void play_dma_callback(void)
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{
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const void *start;
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size_t size;
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if (pcm_play_dma_complete_callback(PCM_DMAST_OK, &start, &size))
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{
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set_dma(start, size);
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REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) |= DMAC_DCCSR_EN;
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pcm_play_dma_status_callback(PCM_DMAST_STARTED);
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}
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}
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void DMA_CALLBACK(DMA_AIC_TX_CHANNEL)(void) __attribute__ ((section(".icode")));
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void DMA_CALLBACK(DMA_AIC_TX_CHANNEL)(void)
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{
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if (REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) & DMAC_DCCSR_AR)
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{
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logf("PCM DMA address error");
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REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) &= ~DMAC_DCCSR_AR;
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}
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if (REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) & DMAC_DCCSR_HLT)
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{
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logf("PCM DMA halt");
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REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) &= ~DMAC_DCCSR_HLT;
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}
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if (REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) & DMAC_DCCSR_TT)
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{
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REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) &= ~DMAC_DCCSR_TT;
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play_dma_callback();
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}
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}
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void pcm_play_dma_start(const void *addr, size_t size)
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{
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2020-09-04 19:55:11 +00:00
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pcm_play_dma_stop();
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2018-06-28 10:24:26 +00:00
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__dmac_channel_enable_clk(DMA_AIC_TX_CHANNEL);
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set_dma(addr, size);
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__aic_enable_replay();
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__dmac_channel_enable_irq(DMA_AIC_TX_CHANNEL);
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}
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void pcm_play_dma_stop(void)
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{
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int flags = disable_irq_save();
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REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = (REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) | DMAC_DCCSR_HLT) & ~DMAC_DCCSR_EN;
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__dmac_channel_disable_clk(DMA_AIC_TX_CHANNEL);
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__aic_disable_replay();
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restore_irq(flags);
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}
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static unsigned int play_lock = 0;
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void pcm_play_lock(void)
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{
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int flags = disable_irq_save();
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if (++play_lock == 1)
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__dmac_channel_disable_irq(DMA_AIC_TX_CHANNEL);
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restore_irq(flags);
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}
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void pcm_play_unlock(void)
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{
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int flags = disable_irq_save();
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if (--play_lock == 0)
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__dmac_channel_enable_irq(DMA_AIC_TX_CHANNEL);
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restore_irq(flags);
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}
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static int get_dma_count(void)
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{
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int count = REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL);
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switch(REG_DMAC_DCMD(DMA_AIC_TX_CHANNEL) & DMAC_DCMD_DS_MASK)
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{
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case DMAC_DCMD_DS_16BIT:
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count *= 2;
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break;
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case DMAC_DCMD_DS_32BIT:
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count *= 4;
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break;
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case DMAC_DCMD_DS_16BYTE:
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count *= 16;
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break;
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}
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return count;
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}
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