2002-04-20 23:01:30 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 by Linus Nielsen Feltzing
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "lcd.h"
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2005-01-24 14:40:10 +00:00
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#include "cpu.h"
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2002-05-16 21:20:52 +00:00
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#include "kernel.h"
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2003-02-14 09:44:34 +00:00
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#include "thread.h"
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2002-04-20 23:01:30 +00:00
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#include "debug.h"
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2003-11-06 01:34:50 +00:00
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#include "system.h"
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2002-04-20 23:01:30 +00:00
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2003-11-06 01:34:50 +00:00
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/* cute little functions, atomic read-modify-write */
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2005-01-27 12:16:45 +00:00
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#if CONFIG_I2C == I2C_GMINI
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2005-01-24 14:40:10 +00:00
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/* This is done like this in the Archos' firmware.
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* However, the TCC370 has an integrated I2C
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* controller (bound to the same lines). It should be
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* possible to use it and thus save some space in flash.
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*/
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#define SDA_LO (P3 &= ~0x20)
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#define SDA_HI (P3 |= 0x20)
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#define SDA_INPUT (P3CONH &= ~0x0C)
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#define SDA_OUTPUT (P3CONH |= 0x04)
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#define SDA (P3 & 0x20)
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#define SCL_LO (P3 &= ~0x10)
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#define SCL_HI (P3 |= 0x10)
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#define SCL_INPUT (P3CONH &= ~0x03)
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#define SCL_OUTPUT (P3CONH |= 0x01)
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#define SCL (P3 & 0x10)
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2005-01-27 12:16:45 +00:00
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#else /* non Gmini below */
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2005-01-24 14:40:10 +00:00
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2004-09-10 07:24:00 +00:00
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/* SDA is PB7 */
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2003-11-07 12:15:24 +00:00
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#define SDA_LO and_b(~0x80, &PBDRL)
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#define SDA_HI or_b(0x80, &PBDRL)
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#define SDA_INPUT and_b(~0x80, &PBIORL)
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#define SDA_OUTPUT or_b(0x80, &PBIORL)
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2005-05-07 22:29:35 +00:00
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#define SDA (PBDRL & 0x80)
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2003-11-07 12:15:24 +00:00
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2005-01-27 12:16:45 +00:00
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#if CONFIG_I2C == I2C_ONDIO
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2004-09-10 07:24:00 +00:00
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/* Ondio pinout, SCL moved to PB6 */
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#define SCL_INPUT and_b(~0x40, &PBIORL)
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#define SCL_OUTPUT or_b(0x40, &PBIORL)
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#define SCL_LO and_b(~0x40, &PBDRL)
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#define SCL_HI or_b(0x40, &PBDRL)
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2005-05-07 22:29:35 +00:00
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#define SCL (PBDRL & 0x40)
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2004-09-10 07:24:00 +00:00
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#else
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/* "classic" pinout, SCL is PB13 */
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2003-11-07 12:15:24 +00:00
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#define SCL_INPUT and_b(~0x20, &PBIORH)
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#define SCL_OUTPUT or_b(0x20, &PBIORH)
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#define SCL_LO and_b(~0x20, &PBDRH)
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#define SCL_HI or_b(0x20, &PBDRH)
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2005-05-07 22:29:35 +00:00
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#define SCL (PBDRH & 0x20)
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2004-09-10 07:24:00 +00:00
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#endif
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2005-01-27 12:16:45 +00:00
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#endif /* ! I2C_GMINI */
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2002-04-20 23:01:30 +00:00
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/* arbitrary delay loop */
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#define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0)
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2002-06-24 10:34:24 +00:00
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static struct mutex i2c_mtx;
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void i2c_begin(void)
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{
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mutex_lock(&i2c_mtx);
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}
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void i2c_end(void)
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{
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mutex_unlock(&i2c_mtx);
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}
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2002-04-20 23:01:30 +00:00
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void i2c_start(void)
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{
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SDA_OUTPUT;
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SDA_HI;
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SCL_HI;
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SDA_LO;
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DELAY;
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SCL_LO;
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}
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void i2c_stop(void)
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{
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SDA_LO;
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SCL_HI;
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DELAY;
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SDA_HI;
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}
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void i2c_init(void)
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{
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int i;
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2005-01-27 12:16:45 +00:00
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#if CONFIG_I2C == I2C_GMINI
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2005-01-24 14:40:10 +00:00
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SCL_INPUT;
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SDA_INPUT;
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2005-05-07 22:29:35 +00:00
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#elif CONFIG_I2C == I2C_ONDIO
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/* make PB6 & PB7 general I/O */
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PBCR2 &= ~0xf000;
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2005-01-27 12:16:45 +00:00
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#else /* not Gmini, not Ondio */
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2005-05-07 22:29:35 +00:00
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/* make PB7 & PB13 general I/O */
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2002-04-20 23:01:30 +00:00
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PBCR1 &= ~0x0c00; /* PB13 */
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2005-05-07 22:29:35 +00:00
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PBCR2 &= ~0xc000; /* PB7 */
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2004-09-10 07:24:00 +00:00
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#endif
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2002-04-20 23:01:30 +00:00
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2004-09-10 07:24:00 +00:00
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SCL_OUTPUT;
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2002-04-20 23:01:30 +00:00
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SDA_OUTPUT;
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SDA_HI;
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SCL_LO;
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for (i=0;i<3;i++)
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i2c_stop();
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}
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void i2c_ack(int bit)
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{
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/* Here's the deal. The MAS is slow, and sometimes needs to wait
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before it can receive the acknowledge. Therefore it forces the clock
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low until it is ready. We need to poll the clock line until it goes
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high before we release the ack. */
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SCL_LO; /* Set the clock low */
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if ( bit )
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2003-11-06 01:34:50 +00:00
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{
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2002-04-20 23:01:30 +00:00
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SDA_HI;
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2003-11-06 01:34:50 +00:00
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}
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2002-04-20 23:01:30 +00:00
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else
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2003-11-06 01:34:50 +00:00
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{
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2002-04-20 23:01:30 +00:00
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SDA_LO;
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2003-11-06 01:34:50 +00:00
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}
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2002-04-20 23:01:30 +00:00
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SCL_INPUT; /* Set the clock to input */
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2002-05-16 21:20:52 +00:00
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while(!SCL) /* and wait for the MAS to release it */
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2003-02-14 09:44:34 +00:00
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sleep_thread();
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wake_up_thread();
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2002-04-20 23:01:30 +00:00
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DELAY;
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SCL_OUTPUT;
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SCL_LO;
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}
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int i2c_getack(void)
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{
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2002-05-28 15:07:45 +00:00
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int ret = 1;
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2002-04-20 23:01:30 +00:00
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/* Here's the deal. The MAS is slow, and sometimes needs to wait
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before it can send the acknowledge. Therefore it forces the clock
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low until it is ready. We need to poll the clock line until it goes
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high before we read the ack. */
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2002-06-19 12:00:37 +00:00
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2003-01-21 19:37:29 +00:00
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#ifdef HAVE_I2C_LOW_FIRST
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2002-04-20 23:01:30 +00:00
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SDA_LO; /* First, discharge the data line */
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2002-06-19 12:00:37 +00:00
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#endif
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2002-04-20 23:01:30 +00:00
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SDA_INPUT; /* And set to input */
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SCL_INPUT; /* Set the clock to input */
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2002-05-16 21:20:52 +00:00
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while(!SCL) /* and wait for the MAS to release it */
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2003-02-14 09:44:34 +00:00
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sleep_thread();
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wake_up_thread();
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2002-05-16 21:20:52 +00:00
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2002-05-28 15:07:45 +00:00
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if (SDA)
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2002-04-20 23:01:30 +00:00
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/* ack failed */
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2002-05-28 15:07:45 +00:00
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ret = 0;
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2002-04-20 23:01:30 +00:00
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SCL_OUTPUT;
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SCL_LO;
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SDA_HI;
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SDA_OUTPUT;
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2002-05-28 15:07:45 +00:00
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return ret;
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2002-04-20 23:01:30 +00:00
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}
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void i2c_outb(unsigned char byte)
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{
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int i;
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/* clock out each bit, MSB first */
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for ( i=0x80; i; i>>=1 ) {
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if ( i & byte )
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2003-11-06 01:34:50 +00:00
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{
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2002-04-20 23:01:30 +00:00
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SDA_HI;
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2003-11-06 01:34:50 +00:00
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}
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2002-04-20 23:01:30 +00:00
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else
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2003-11-06 01:34:50 +00:00
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{
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2002-04-20 23:01:30 +00:00
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SDA_LO;
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2003-11-06 01:34:50 +00:00
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}
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2002-04-20 23:01:30 +00:00
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SCL_HI;
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SCL_LO;
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}
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SDA_HI;
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}
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unsigned char i2c_inb(int ack)
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{
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int i;
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unsigned char byte = 0;
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/* clock in each bit, MSB first */
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for ( i=0x80; i; i>>=1 ) {
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2003-01-21 19:37:29 +00:00
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#ifdef HAVE_I2C_LOW_FIRST
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2002-04-20 23:01:30 +00:00
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/* Tricky business. Here we discharge the data line by driving it low
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and then set it to input to see if it stays low or goes high */
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SDA_LO; /* First, discharge the data line */
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2002-06-19 12:00:37 +00:00
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#endif
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2002-04-20 23:01:30 +00:00
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SDA_INPUT; /* And set to input */
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SCL_HI;
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if ( SDA )
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byte |= i;
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SCL_LO;
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SDA_OUTPUT;
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}
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i2c_ack(ack);
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return byte;
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}
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2004-08-17 01:45:48 +00:00
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int i2c_write(int address, const unsigned char* buf, int count )
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2002-04-20 23:01:30 +00:00
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{
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int i,x=0;
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i2c_start();
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i2c_outb(address & 0xfe);
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if (i2c_getack())
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{
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for (i=0; i<count; i++)
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{
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i2c_outb(buf[i]);
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if (!i2c_getack())
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{
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x=-2;
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break;
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}
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}
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}
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else
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{
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debugf("i2c_write() - no ack\n");
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x=-1;
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}
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i2c_stop();
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return x;
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}
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int i2c_read(int address, unsigned char* buf, int count )
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{
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int i,x=0;
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i2c_start();
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i2c_outb(address | 1);
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if (i2c_getack()) {
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for (i=0; i<count; i++) {
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buf[i] = i2c_inb(0);
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}
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}
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else
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x=-1;
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i2c_stop();
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return x;
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}
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