2008-11-20 11:27:31 +00:00
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#include "codeclib.h"
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2006-01-28 21:21:21 +00:00
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#ifdef CPU_ARM
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#define _ARM_ASSEM_
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#endif
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2005-05-07 22:41:17 +00:00
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#ifdef ROCKBOX_BIG_ENDIAN
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2005-02-17 09:08:18 +00:00
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#define BIG_ENDIAN 1
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#define LITTLE_ENDIAN 0
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2005-05-07 22:41:17 +00:00
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#define BYTE_ORDER BIG_ENDIAN
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2005-02-19 11:58:42 +00:00
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#else
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2005-05-07 22:41:17 +00:00
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#define BYTE_ORDER LITTLE_ENDIAN
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#define LITTLE_ENDIAN 1
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#define BIG_ENDIAN 0
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2005-02-19 11:58:42 +00:00
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#endif
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2005-05-27 09:14:00 +00:00
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2006-11-09 21:59:27 +00:00
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#ifndef ICODE_ATTR_TREMOR_MDCT
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#define ICODE_ATTR_TREMOR_MDCT ICODE_ATTR
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#endif
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#ifndef ICODE_ATTR_TREMOR_NOT_MDCT
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#define ICODE_ATTR_TREMOR_NOT_MDCT ICODE_ATTR
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2006-01-03 11:58:39 +00:00
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#endif
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2005-05-27 09:14:00 +00:00
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2009-04-25 11:25:13 +00:00
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/* Define CPU of large IRAM (MCF5250) */
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#if (CONFIG_CPU == MCF5250)
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/* PCM_BUFFER : 32768 Byte (4096*2*4) *
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* WINDOW_LOOKUP : 4608 Byte (128*4 + 1024*4) *
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* TOTAL : 37376 */
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#define IRAM_IBSS_SIZE 37376
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/* Define CPU of large IRAM (PP5022/5024) */
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#elif (CONFIG_CPU == PP5022) || (CONFIG_CPU == PP5024)
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/* PCM_BUFFER : 32768 byte (4096*2*4 or 2048*4*4) *
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* WINDOW_LOOKUP : 9216 Byte (256*4 + 2048*4) *
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* TOTAL : 41984 */
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#define IRAM_IBSS_SIZE 41984
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/* Define CPU of Normal IRAM (96KB) (and SIM also) */
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#else
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/* PCM_BUFFER : 16384 Byte (2048*2*4) *
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* WINDOW_LOOKUP : 4608 Byte (128*4 + 1024*4) *
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* TOTAL : 20992 */
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#define IRAM_IBSS_SIZE 20992
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#endif
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/* max 2 channels */
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#define CHANNELS 2
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2005-05-27 09:14:00 +00:00
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// #define _LOW_ACCURACY_
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