2005-11-07 23:07:19 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 by Linus Nielsen Feltzing
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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/*
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* Driver for ARM i2c driver
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*
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*
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*/
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#ifndef _I2C_ARM_H
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#define _I2C_ARM_H
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2005-11-11 17:51:35 +00:00
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/* TODO: Implement: i2c-pp5020.h */
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2005-11-07 23:07:19 +00:00
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void i2c_init(void);
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int i2c_write(int device, unsigned char *buf, int count);
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void i2c_close(void);
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#define MAX_LOOP 0x100 /* TODO: select a better value */
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/* PLLCR control */
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#define QSPISEL (1 << 11) /* Selects QSPI or I2C interface */
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/* Offsets to I2C registers from base address */
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#define O_MADR 0x00 /* Slave Address */
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#define O_MFDR 0x04 /* Frequency divider */
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#define O_MBCR 0x08 /* Control register */
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#define O_MBSR 0x0c /* Status register */
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#define O_MBDR 0x10 /* Data register */
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/* MBSR - Status register */
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#define ICF (1 << 7) /* Transfer Complete */
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#define IAAS (1 << 6) /* Addressed As Alave */
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#define IBB (1 << 5) /* Bus Busy */
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#define IAL (1 << 4) /* Arbitration Lost */
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#define SRW (1 << 2) /* Slave R/W */
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#define IFF (1 << 1) /* I2C Interrupt */
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#define RXAK (1 << 0) /* No Ack bit */
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/* MBCR - Control register */
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#define IEN (1 << 7) /* I2C Enable */
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#define IIEN (1 << 6) /* Interrupt Enable */
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#define MSTA (1 << 5) /* Master/Slave select */
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#define MTX (1 << 4) /* Transmit/Receive */
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#define TXAK (1 << 3) /* Transfer ACK */
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#define RSTA (1 << 2) /* Restart.. */
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#endif
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