rockbox/firmware/export/config-h10.h

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/*
* This config file is for the iriver H10 20Gb
*/
#define TARGET_TREE /* this target is using the target tree system */
/* For Rolo and boot loader */
#define MODEL_NUMBER 13
Add working dual-boot bootloaders for H10 and Sansa, which allow booting the OF and Rockbox. Rolo also works. Changes made: Combine bootloader/h10.c and bootloader/e200.c into a common bootloader file (bootloader/main-pp.c) to be used by all mi4 based PortalPlayer targets. The file bootloader/main-pp.c is based off the old bootloader/h10.c with some minor changes to allow it to work on the Sansa too. This effectively adds a Sansa bootloader. Define MODEL_NAME string in config-*.h for use in bootloader. Split crt0-pp.S into separate files for bootloader and normal builds. Bootloader code is now in crt0-pp-bl.S while normal build code stays in crt0-pp.S. Improvements to crt0-pp.S and crt0-pp-bl.S (mostly to make it more multiprocessor safe): * Leave space in bootloader at 0xe0-0xeb since scramble writes over there when it creates the mi4 file (don't leave space for iPods since it's not needed and all code in crt0-pp-bl.S needs to fit before the boot_table at 0x100). * Remove unused DEBUG and STUB code from crt0-pp.S. * Make CPU wait for COP to be sleeping when we put the COP to sleep. * Invalidate COP cache when COP wakes * Flush CPU cache before waking COP * Make sure only the CPU clears the BSS (not the COP) * Make sure only the CPU sets up its own stack (not the COP) Rolo works on H10, so enable it. Make Sansa e200 use rockbox.e200 rather than PP5022.mi4 for 'Normal' builds. This makes updating rockbox simpler as we don't need to go through the firmware update procedure, but rather just put a new rockbox.e200 on the device. rockbox.e200 uses a simple 'add' checksum. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11815 a1c6a512-1295-4272-9138-f99709370657
2006-12-19 11:33:53 +00:00
#define MODEL_NAME "iriver H10 20GB"
/* define this if you have recording possibility */
#define HAVE_RECORDING 1
/* define the bitmask of hardware sample rates */
#define HW_SAMPR_CAPS (SAMPR_CAP_44)
/* define the bitmask of recording sample rates */
#define REC_SAMPR_CAPS (SAMPR_CAP_44)
/* define this if you have a bitmap LCD display */
#define HAVE_LCD_BITMAP 1
/* define this if you have a colour LCD */
#define HAVE_LCD_COLOR 1
/* define this if you have access to the quickscreen */
#define HAVE_QUICKSCREEN
/* define this if you have access to the pitchscreen */
#define HAVE_PITCHSCREEN
/* define this if you would like tagcache to build on this target */
#define HAVE_TAGCACHE
/* LCD dimensions */
#define LCD_WIDTH 160
#define LCD_HEIGHT 128
#define LCD_DEPTH 16 /* 65536 colours */
#define LCD_PIXELFORMAT RGB565 /* rgb565 */
/* define this if you can flip your LCD */
#define HAVE_LCD_FLIP
/* define this if you can invert the colours on your LCD */
#define HAVE_LCD_INVERT
/* #define IRAM_LCDFRAMEBUFFER IDATA_ATTR *//* put the lcd frame buffer in IRAM */
#define CONFIG_KEYPAD IRIVER_H10_PAD
/* Define this if you do software codec */
#define CONFIG_CODEC SWCODEC
/* define this if you have a real-time clock */
#ifndef BOOTLOADER
#define CONFIG_RTC RTC_E8564
#endif
/* Define this if you have a software controlled poweroff */
#define HAVE_SW_POWEROFF
/* The number of bytes reserved for loadable codecs */
#define CODEC_SIZE 0x80000
/* The number of bytes reserved for loadable plugins */
#define PLUGIN_BUFFER_SIZE 0x80000
/* Define this if you have the WM8975 audio codec */
#define HAVE_WM8731
#define AB_REPEAT_ENABLE 1
/* FM Tuner */
/*#define CONFIG_TUNER TEA5767
#define CONFIG_TUNER_XTAL 32768 *//* TODO: what is this? */
/* Define this for LCD backlight available */
#define CONFIG_BACKLIGHT BL_H10 /* TODO: figure this out, probably not necessary
because of 'target' stuff */
#define BATTERY_CAPACITY_DEFAULT 1550 /* default battery capacity */
#define AB_REPEAT_ENABLE 1
#ifndef SIMULATOR
/* Define this if you have a PortalPlayer PP5020 */
#define CONFIG_CPU PP5020
/* Define this if you want to use the PP5020 i2c interface */
#define CONFIG_I2C I2C_PP5020
/* Type of mobile power */
#define CONFIG_BATTERY BATT_LPCS355385
#define BATTERY_CAPACITY_MIN 1500 /* min. capacity selectable */
#define BATTERY_CAPACITY_MAX 1600 /* max. capacity selectable */
#define BATTERY_CAPACITY_INC 10 /* capacity increment */
#define BATTERY_TYPES_COUNT 1 /* only one type */
#define BATTERY_SCALE_FACTOR 4688
/* Hardware controlled charging */
#define CONFIG_CHARGING CHARGING_SIMPLE
/* define this if the hardware can be powered off while charging */
#define HAVE_POWEROFF_WHILE_CHARGING
/* The start address index for ROM builds */
#define ROM_START 0x00000000
/* Define this to the CPU frequency */
#define CPU_FREQ 75000000
/* Type of LCD */
#define CONFIG_LCD LCD_H10_20GB
/* Define this if your LCD can set contrast */
#define HAVE_LCD_CONTRAST
#define MIN_CONTRAST_SETTING 0
#define MAX_CONTRAST_SETTING 30
#define DEFAULT_CONTRAST_SETTING 14 /* Match boot contrast */
/* Define this if your LCD can be enabled/disabled */
#define HAVE_LCD_ENABLE
/* Define this if your LCD can be put to sleep. HAVE_LCD_ENABLE
* should be defined as well.
* We can currently put the lcd to sleep but it won't wake up properly */
#define HAVE_LCD_SLEEP
/* We're able to shut off power to the HDD */
#define HAVE_ATA_POWER_OFF
/* Offset ( in the firmware file's header ) to the file length */
#define FIRMWARE_OFFSET_FILE_LENGTH 0
/* Offset ( in the firmware file's header ) to the file CRC */
#define FIRMWARE_OFFSET_FILE_CRC 0
/* Offset ( in the firmware file's header ) to the real data */
#define FIRMWARE_OFFSET_FILE_DATA 8
/* #define USB_IPODSTYLE */
/* USB On-the-go */
#define CONFIG_USBOTG USBOTG_ARC
/* define this if the unit can be powered or charged via USB */
#define HAVE_USB_POWER
/* Virtual LED (icon) */
#define CONFIG_LED LED_VIRTUAL
/* Define this if you have adjustable CPU frequency */
/*#define HAVE_ADJUSTABLE_CPU_FREQ*/
#define BOOTFILE_EXT "h10"
#define BOOTFILE "rockbox." BOOTFILE_EXT
#define ICODE_ATTR_TREMOR_NOT_MDCT
#endif