2007-08-27 16:04:32 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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2007-08-27 22:12:35 +00:00
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* $Id$
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2007-08-27 16:04:32 +00:00
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*
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* Copyright (C) 2007 by Christian Gmeiner
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*
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* Based on code from the Linux Target Image Builder from Freescale
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* available at http://www.bitshrine.org/ and
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* http://www.bitshrine.org/gpp/linux-2.6.16-mx31-usb-2.patch
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* Adapted for Rockbox in January 2007
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* Original file: drivers/usb/gadget/arcotg_udc.c
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*
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* USB Device Controller Driver
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* Driver for ARC OTG USB module in the i.MX31 platform, etc.
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*
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* Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* Based on mpc-udc.h
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* Author: Li Yang (leoli@freescale.com)
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* Jiang Bo (Tanya.jiang@freescale.com)
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <string.h>
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#include "arcotg_dcd.h"
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/*-------------------------------------------------------------------------*/
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static struct arcotg_dcd dcd_controller;
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struct usb_response res;
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/* datastructes to controll transfers */
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struct dtd dev_td[USB_MAX_PIPES] IBSS_ATTR;
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struct dqh dev_qh[USB_MAX_PIPES] __attribute((aligned (1 << 11))) IBSS_ATTR;
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/* shared memory used by rockbox and dcd to exchange data */
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#define BUFFER_SIZE 512
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unsigned char buffer[BUFFER_SIZE] IBSS_ATTR;
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/*-------------------------------------------------------------------------*/
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/* description of our device driver operations */
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struct usb_dcd_controller_ops arotg_dcd_ops = {
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.enable = usb_arcotg_dcd_enable,
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2007-09-17 22:23:51 +00:00
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.disable = usb_arcotg_dcd_disable,
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2007-08-27 16:04:32 +00:00
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.set_halt = usb_arcotg_dcd_set_halt,
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.send = usb_arcotg_dcd_send,
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.receive = usb_arcotg_dcd_receive,
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.ep0 = &dcd_controller.endpoints[0],
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};
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/* description of our usb controller driver */
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struct usb_controller arcotg_dcd = {
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.name = "arcotg_dcd",
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.type = DEVICE,
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.speed = USB_SPEED_UNKNOWN,
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.init = usb_arcotg_dcd_init,
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.shutdown = usb_arcotg_dcd_shutdown,
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.irq = usb_arcotg_dcd_irq,
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.start = usb_arcotg_dcd_start,
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.stop = usb_arcotg_dcd_stop,
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.controller_ops = (void*)&arotg_dcd_ops,
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};
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static struct usb_response response;
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/*-------------------------------------------------------------------------*/
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/* TODO hmmm */
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struct timer {
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unsigned long s;
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unsigned long e;
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};
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void
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timer_set(struct timer * timer, unsigned long val)
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{
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timer->s = USEC_TIMER;
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timer->e = timer->s + val + 1;
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}
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int
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timer_expired(struct timer * timer)
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{
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unsigned long val = USEC_TIMER;
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if (timer->e > timer->s) {
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return !(val >= timer->s && val <= timer->e);
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} else {
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return (val > timer->e && val < timer->s);
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}
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}
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#define MAX_PACKET_SIZE USB_MAX_CTRL_PAYLOAD
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#define ERROR_TIMEOUT (-3)
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#define ERROR_UNKNOWN (-7)
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#define PRIME_TIMER 100000
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#define TRANSFER_TIMER 1000000
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#define RESET_TIMER 5000000
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#define SETUP_TIMER 200000
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/*-------------------------------------------------------------------------*/
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/* gets called by usb_stack_init() to register
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2007-09-19 23:20:55 +00:00
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* this arcotg device controller driver in the
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2007-08-27 16:04:32 +00:00
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* stack. */
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2007-08-27 22:07:36 +00:00
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void usb_dcd_init(void)
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{
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2007-08-27 16:04:32 +00:00
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usb_controller_register(&arcotg_dcd);
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}
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/*-------------------------------------------------------------------------*/
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2007-08-27 22:07:36 +00:00
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void usb_arcotg_dcd_init(void)
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{
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2007-08-27 16:04:32 +00:00
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struct timer t;
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int i, ep_num = 0;
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logf("arcotg_dcd: init");
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memset(&dcd_controller, 0, sizeof(struct arcotg_dcd));
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/* setup list of aviable endpoints */
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INIT_LIST_HEAD(&arcotg_dcd.endpoints.list);
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for (i = 0; i < USB_MAX_PIPES; i++) {
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dcd_controller.endpoints[i].pipe_num = i;
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if (i % 2 == 0) {
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dcd_controller.endpoints[i].ep_num = ep_num;
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} else {
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dcd_controller.endpoints[i].ep_num = ep_num;
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ep_num++;
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}
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2007-08-29 00:33:16 +00:00
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logf("pipe %d -> ep %d %s", dcd_controller.endpoints[i].pipe_num,
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dcd_controller.endpoints[i].ep_num,
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dcd_controller.endpoints[i].name);
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2007-08-27 16:04:32 +00:00
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if (ep_name[i] != NULL) {
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2007-08-29 00:33:16 +00:00
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memcpy(&dcd_controller.endpoints[i].name, ep_name[i],
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sizeof(dcd_controller.endpoints[i].name));
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2007-08-27 16:04:32 +00:00
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if (i != 0) {
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/* add to list of configurable endpoints */
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2007-08-29 00:33:16 +00:00
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list_add_tail(&dcd_controller.endpoints[i].list,
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&arcotg_dcd.endpoints.list);
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2007-08-27 16:04:32 +00:00
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}
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}
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}
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/* ep0 is special */
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arcotg_dcd.ep0 = &dcd_controller.endpoints[0];
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arcotg_dcd.ep0->maxpacket = USB_MAX_CTRL_PAYLOAD;
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/* stop */
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UDC_USBCMD &= ~USB_CMD_RUN;
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udelay(50000);
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timer_set(&t, RESET_TIMER);
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/* reset */
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UDC_USBCMD |= USB_CMD_CTRL_RESET;
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while ((UDC_USBCMD & USB_CMD_CTRL_RESET)) {
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if (timer_expired(&t)) {
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logf("TIMEOUT->init");
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}
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}
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/* put controller in device mode */
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UDC_USBMODE |= USB_MODE_CTRL_MODE_DEVICE;
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2007-08-27 22:07:36 +00:00
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/* init queue heads */
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2007-08-27 16:04:32 +00:00
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qh_init(0, USB_RECV, USB_ENDPOINT_XFER_CONTROL, USB_MAX_CTRL_PAYLOAD, 0, 0);
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2007-08-27 22:07:36 +00:00
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qh_init(0, USB_SEND, USB_ENDPOINT_XFER_CONTROL, USB_MAX_CTRL_PAYLOAD, 0, 0);
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2007-08-27 16:04:32 +00:00
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UDC_ENDPOINTLISTADDR = (unsigned int)dev_qh;
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}
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2007-08-27 22:07:36 +00:00
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void usb_arcotg_dcd_shutdown(void)
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{
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2007-08-27 16:04:32 +00:00
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}
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2007-08-27 22:07:36 +00:00
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void usb_arcotg_dcd_start(void)
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{
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2007-08-27 16:04:32 +00:00
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logf("start");
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/* clear stopped bit */
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2007-08-27 22:07:36 +00:00
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dcd_controller.stopped = false;
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2007-08-27 16:04:32 +00:00
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UDC_USBCMD |= USB_CMD_RUN;
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}
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2007-08-27 22:07:36 +00:00
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void usb_arcotg_dcd_stop(void)
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{
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2007-08-27 16:04:32 +00:00
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logf("stop");
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/* set stopped bit */
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dcd_controller.stopped = true;
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UDC_USBCMD &= ~USB_CMD_RUN;
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}
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2007-08-27 22:07:36 +00:00
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void usb_arcotg_dcd_irq(void)
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{
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2007-08-27 16:04:32 +00:00
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if (dcd_controller.stopped == true) {
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return;
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}
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/* check if we need to wake up from suspend */
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if (!(UDC_USBSTS & USB_STS_SUSPEND) && dcd_controller.resume_state) {
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resume_int();
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}
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/* USB Interrupt */
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if (UDC_USBSTS & USB_STS_INT) {
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/* setup packet, we only support ep0 as control ep */
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if (UDC_ENDPTSETUPSTAT & EP_SETUP_STATUS_EP0) {
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/* copy data from queue head to local buffer */
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2007-08-29 00:33:16 +00:00
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memcpy(&dcd_controller.local_setup_buff,
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(uint8_t *) &dev_qh[0].setup_buffer, 8);
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2007-08-30 22:20:24 +00:00
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2007-08-30 22:26:46 +00:00
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/* ack setup packet */
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2007-08-27 16:04:32 +00:00
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UDC_ENDPTSETUPSTAT = UDC_ENDPTSETUPSTAT;
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setup_received_int(&dcd_controller.local_setup_buff);
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}
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2007-08-29 09:17:15 +00:00
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2007-08-30 22:20:24 +00:00
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if (UDC_ENDPTCOMPLETE) {
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dtd_complete();
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2007-08-27 16:04:32 +00:00
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}
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}
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2007-08-27 22:07:36 +00:00
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2007-08-27 16:04:32 +00:00
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if (UDC_USBSTS & USB_STS_PORT_CHANGE) {
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port_change_int();
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}
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if (UDC_USBSTS & USB_STS_SUSPEND) {
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suspend_int();
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}
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if (UDC_USBSTS & USB_STS_RESET) {
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reset_int();
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}
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if (UDC_USBSTS & USB_STS_ERR) {
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logf("!!! error !!!");
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}
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if (UDC_USBSTS & USB_STS_SYS_ERR) {
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logf("!!! sys error !!!");
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}
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}
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/*-------------------------------------------------------------------------*/
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/* interrupt handlers */
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2007-08-27 22:07:36 +00:00
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static void setup_received_int(struct usb_ctrlrequest* request)
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{
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2007-08-27 16:04:32 +00:00
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int error = 0;
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uint8_t address = 0;
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2007-08-30 19:23:37 +00:00
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bool set_config = false;
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2007-08-27 16:04:32 +00:00
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int handled = 0; /* set to zero if we do not handle the message, */
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2007-08-27 22:07:36 +00:00
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/* and should pass it to the driver */
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2007-08-27 16:04:32 +00:00
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into_usb_ctrlrequest(request);
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/* handle all requests we support */
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switch (request->bRequestType & USB_TYPE_MASK) {
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case USB_TYPE_STANDARD:
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switch (request->bRequest) {
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case USB_REQ_SET_ADDRESS:
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/* store address as we need to ack before setting it */
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address = (uint8_t)request->wValue;
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handled = 1;
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break;
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2007-08-30 19:23:37 +00:00
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case USB_REQ_SET_CONFIGURATION:
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set_config = true;
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break;
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2007-08-27 16:04:32 +00:00
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2007-08-30 19:23:37 +00:00
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case USB_REQ_GET_STATUS:
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2007-08-27 16:04:32 +00:00
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response.buf = &dcd_controller.usb_state;
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response.length = 2;
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handled = usb_arcotg_dcd_send(NULL, &response);
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break;
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}
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case USB_REQ_CLEAR_FEATURE:
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case USB_REQ_SET_FEATURE:
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2007-08-30 22:20:24 +00:00
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if (request->bRequestType != USB_RECIP_ENDPOINT) {
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break;
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2007-08-27 16:04:32 +00:00
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}
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2007-08-30 22:20:24 +00:00
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int dir = (request->wIndex & 0x0080) ? EP_DIR_IN : EP_DIR_OUT;
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int num = (request->wIndex & 0x000f);
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struct usb_ep *ep;
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if (request->wValue != 0 ||
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request->wLength != 0 ||
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(num * 2 + dir) > USB_MAX_PIPES) {
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break;
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2007-08-27 22:07:36 +00:00
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}
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2007-08-30 22:20:24 +00:00
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ep = &dcd_controller.endpoints[num * 2 + dir];
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if (request->bRequest == USB_REQ_SET_FEATURE) {
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logf("HALT");
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handled = usb_arcotg_dcd_set_halt(ep, true);
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} else {
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logf("UNHALT");
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handled = usb_arcotg_dcd_set_halt(ep, false);
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}
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if (handled == 0) {
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handled = 1; /* dont pass it to driver */
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}
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2007-08-27 16:04:32 +00:00
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break;
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}
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/* if dcd can not handle reqeust, ask driver */
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if (handled == 0) {
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2007-08-29 00:33:16 +00:00
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if (arcotg_dcd.device_driver != NULL &&
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arcotg_dcd.device_driver->request != NULL) {
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2007-08-27 16:04:32 +00:00
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|
|
handled = arcotg_dcd.device_driver->request(request);
|
|
|
|
logf("result from driver %d", handled);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (handled <= 0) {
|
|
|
|
error = handled;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* ack transfer */
|
|
|
|
usb_ack(request, error);
|
|
|
|
|
2007-08-30 19:23:37 +00:00
|
|
|
/* set address and usb state after USB_REQ_SET_ADDRESS */
|
2007-08-27 16:04:32 +00:00
|
|
|
if (address != 0) {
|
|
|
|
logf("setting address to %d", address);
|
|
|
|
UDC_DEVICEADDR = address << 25;
|
2007-08-30 19:23:37 +00:00
|
|
|
dcd_controller.usb_state = USB_STATE_ADDRESS;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* update usb state after successfull USB_REQ_SET_CONFIGURATION */
|
|
|
|
if (set_config) {
|
|
|
|
if (handled > 0) {
|
|
|
|
dcd_controller.usb_state = USB_STATE_CONFIGURED;
|
|
|
|
}
|
2007-08-27 16:04:32 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-08-27 22:07:36 +00:00
|
|
|
static void port_change_int(void)
|
|
|
|
{
|
2007-08-27 16:04:32 +00:00
|
|
|
uint32_t tmp;
|
|
|
|
enum usb_device_speed speed = USB_SPEED_UNKNOWN;
|
|
|
|
|
|
|
|
/* bus resetting is finished */
|
|
|
|
if (!(UDC_PORTSC1 & PORTSCX_PORT_RESET)) {
|
|
|
|
/* Get the speed */
|
|
|
|
tmp = (UDC_PORTSC1 & PORTSCX_PORT_SPEED_MASK);
|
|
|
|
switch (tmp) {
|
|
|
|
case PORTSCX_PORT_SPEED_HIGH:
|
|
|
|
speed = USB_SPEED_HIGH;
|
|
|
|
break;
|
|
|
|
case PORTSCX_PORT_SPEED_FULL:
|
|
|
|
speed = USB_SPEED_FULL;
|
|
|
|
break;
|
|
|
|
case PORTSCX_PORT_SPEED_LOW:
|
|
|
|
speed = USB_SPEED_LOW;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
speed = USB_SPEED_UNKNOWN;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-08-29 13:20:48 +00:00
|
|
|
if (arcotg_dcd.speed == speed) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-08-27 16:04:32 +00:00
|
|
|
/* update speed */
|
|
|
|
arcotg_dcd.speed = speed;
|
2007-08-27 22:07:36 +00:00
|
|
|
|
2007-08-27 16:04:32 +00:00
|
|
|
/* update USB state */
|
|
|
|
if (!dcd_controller.resume_state) {
|
|
|
|
dcd_controller.usb_state = USB_STATE_DEFAULT;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* inform device driver */
|
2007-08-29 00:33:16 +00:00
|
|
|
if (arcotg_dcd.device_driver != NULL &&
|
|
|
|
arcotg_dcd.device_driver->speed != NULL) {
|
2007-08-27 16:04:32 +00:00
|
|
|
arcotg_dcd.device_driver->speed(speed);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-08-30 22:20:24 +00:00
|
|
|
static void dtd_complete(void) {
|
|
|
|
|
|
|
|
uint32_t bit_pos;
|
2007-09-19 23:20:55 +00:00
|
|
|
int i, ep_num, direction, bit_mask /*, status*/;
|
2007-08-30 22:20:24 +00:00
|
|
|
|
|
|
|
/* clear the bits in the register */
|
|
|
|
bit_pos = UDC_ENDPTCOMPLETE;
|
|
|
|
UDC_ENDPTCOMPLETE = bit_pos;
|
|
|
|
|
|
|
|
if (!bit_pos) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < USB_MAX_ENDPOINTS * 2; i++) {
|
|
|
|
ep_num = i >> 1;
|
|
|
|
direction = i % 2;
|
|
|
|
|
|
|
|
bit_mask = 1 << (ep_num + 16 * direction);
|
|
|
|
|
|
|
|
if (!(bit_pos & bit_mask)) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
logf(" ");
|
|
|
|
logf("TRAFFIC");
|
|
|
|
logf(" -> on ep %d dir %d", i, direction);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-08-27 22:07:36 +00:00
|
|
|
static void suspend_int(void)
|
|
|
|
{
|
2007-08-27 16:04:32 +00:00
|
|
|
dcd_controller.resume_state = dcd_controller.usb_state;
|
|
|
|
dcd_controller.usb_state = USB_STATE_SUSPENDED;
|
|
|
|
|
|
|
|
/* report suspend to the driver */
|
2007-08-29 00:33:16 +00:00
|
|
|
if (arcotg_dcd.device_driver != NULL &&
|
|
|
|
arcotg_dcd.device_driver->suspend != NULL) {
|
2007-08-27 16:04:32 +00:00
|
|
|
arcotg_dcd.device_driver->suspend();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-08-27 22:07:36 +00:00
|
|
|
static void resume_int(void)
|
|
|
|
{
|
2007-08-27 16:04:32 +00:00
|
|
|
dcd_controller.usb_state = dcd_controller.resume_state;
|
|
|
|
dcd_controller.resume_state = USB_STATE_NOTATTACHED;
|
|
|
|
|
|
|
|
/* report resume to the driver */
|
2007-08-29 00:33:16 +00:00
|
|
|
if (arcotg_dcd.device_driver != NULL &&
|
|
|
|
arcotg_dcd.device_driver->resume != NULL) {
|
2007-08-27 16:04:32 +00:00
|
|
|
arcotg_dcd.device_driver->resume();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-08-27 22:07:36 +00:00
|
|
|
static void reset_int(void)
|
|
|
|
{
|
2007-08-27 16:04:32 +00:00
|
|
|
struct timer t;
|
|
|
|
|
2007-08-30 19:23:37 +00:00
|
|
|
/* clear device address */
|
|
|
|
UDC_DEVICEADDR = 0 << 25;
|
|
|
|
|
|
|
|
/* update usb state */
|
|
|
|
dcd_controller.usb_state = USB_STATE_DEFAULT;
|
|
|
|
|
2007-08-27 16:04:32 +00:00
|
|
|
timer_set(&t, RESET_TIMER);
|
|
|
|
|
|
|
|
UDC_ENDPTSETUPSTAT = UDC_ENDPTSETUPSTAT;
|
|
|
|
UDC_ENDPTCOMPLETE = UDC_ENDPTCOMPLETE;
|
|
|
|
|
|
|
|
while (UDC_ENDPTPRIME) { /* prime and flush pending transfers */
|
|
|
|
if (timer_expired(&t)) {
|
|
|
|
logf("TIMEOUT->p&f");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
UDC_ENDPTFLUSH = ~0;
|
|
|
|
|
|
|
|
if ((UDC_PORTSC1 & (1 << 8)) == 0) {
|
|
|
|
logf("TIMEOUT->port");
|
|
|
|
}
|
|
|
|
|
|
|
|
UDC_USBSTS = (1 << 6);
|
|
|
|
|
|
|
|
while ((UDC_USBSTS & (1 << 2)) == 0) { /* wait for port change */
|
|
|
|
if (timer_expired(&t)) {
|
|
|
|
logf("TIMEOUT->portchange");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
UDC_USBSTS = (1 << 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* usb controller ops */
|
|
|
|
|
2007-08-29 00:33:16 +00:00
|
|
|
int usb_arcotg_dcd_enable(struct usb_ep* ep,
|
|
|
|
struct usb_endpoint_descriptor* desc)
|
2007-08-27 22:07:36 +00:00
|
|
|
{
|
2007-08-27 16:04:32 +00:00
|
|
|
unsigned short max = 0;
|
|
|
|
unsigned char mult = 0, zlt = 0;
|
|
|
|
int retval = 0;
|
2007-08-27 22:07:36 +00:00
|
|
|
char *val = NULL; /* for debug */
|
2007-08-27 16:04:32 +00:00
|
|
|
|
|
|
|
/* catch bogus parameter */
|
|
|
|
if (!ep) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2007-08-28 20:29:28 +00:00
|
|
|
max = desc->wMaxPacketSize;
|
2007-08-27 16:04:32 +00:00
|
|
|
retval = -EINVAL;
|
|
|
|
|
2007-09-17 23:06:23 +00:00
|
|
|
/* check the max package size validate for this endpoint
|
|
|
|
* Refer to USB2.0 spec table 9-13, */
|
2007-08-28 20:29:28 +00:00
|
|
|
switch (desc->bmAttributes & 0x03) {
|
2007-08-27 16:04:32 +00:00
|
|
|
case USB_ENDPOINT_XFER_BULK:
|
2007-09-17 23:06:23 +00:00
|
|
|
if (strstr(ep->name, "-iso") || strstr(ep->name, "-int")) {
|
|
|
|
goto en_done;
|
|
|
|
}
|
|
|
|
mult = 0;
|
2007-08-27 16:04:32 +00:00
|
|
|
zlt = 1;
|
2007-09-17 23:06:23 +00:00
|
|
|
|
|
|
|
switch (arcotg_dcd.speed) {
|
|
|
|
case USB_SPEED_HIGH:
|
|
|
|
if ((max == 128) || (max == 256) || (max == 512)) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
switch (max) {
|
|
|
|
case 4:
|
|
|
|
case 8:
|
|
|
|
case 16:
|
|
|
|
case 32:
|
|
|
|
case 64:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
case USB_SPEED_LOW:
|
|
|
|
goto en_done;
|
|
|
|
}
|
|
|
|
}
|
2007-08-27 16:04:32 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case USB_ENDPOINT_XFER_INT:
|
2007-09-17 23:06:23 +00:00
|
|
|
if (strstr(ep->name, "-iso")) { /* bulk is ok */
|
|
|
|
goto en_done;
|
|
|
|
}
|
|
|
|
mult = 0;
|
2007-08-27 16:04:32 +00:00
|
|
|
zlt = 1;
|
|
|
|
|
2007-09-17 23:06:23 +00:00
|
|
|
switch (arcotg_dcd.speed) {
|
|
|
|
case USB_SPEED_HIGH:
|
|
|
|
if (max <= 1024) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case USB_SPEED_FULL:
|
|
|
|
if (max <= 64) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
if (max <= 8) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
goto en_done;
|
|
|
|
}
|
2007-08-27 16:04:32 +00:00
|
|
|
break;
|
|
|
|
|
2007-09-17 23:06:23 +00:00
|
|
|
case USB_ENDPOINT_XFER_ISOC:
|
|
|
|
if (strstr(ep->name, "-bulk") || strstr(ep->name, "-int")) {
|
|
|
|
goto en_done;
|
|
|
|
}
|
|
|
|
mult = (unsigned char) (1 +((desc->wMaxPacketSize >> 11) & 0x03));
|
|
|
|
zlt = 0;
|
|
|
|
|
|
|
|
switch (arcotg_dcd.speed) {
|
|
|
|
case USB_SPEED_HIGH:
|
|
|
|
if (max <= 1024) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case USB_SPEED_FULL:
|
|
|
|
if (max <= 1023) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
goto en_done;
|
|
|
|
}
|
2007-08-27 16:04:32 +00:00
|
|
|
break;
|
|
|
|
|
2007-09-17 23:06:23 +00:00
|
|
|
case USB_ENDPOINT_XFER_CONTROL:
|
|
|
|
if (strstr(ep->name, "-iso") || strstr(ep->name, "-int")) {
|
2007-08-27 22:07:36 +00:00
|
|
|
goto en_done;
|
|
|
|
}
|
|
|
|
mult = 0;
|
|
|
|
zlt = 1;
|
|
|
|
|
|
|
|
switch (arcotg_dcd.speed) {
|
|
|
|
case USB_SPEED_HIGH:
|
2007-09-17 23:06:23 +00:00
|
|
|
case USB_SPEED_FULL:
|
2007-08-27 22:07:36 +00:00
|
|
|
switch (max) {
|
2007-09-17 23:06:23 +00:00
|
|
|
case 1:
|
|
|
|
case 2:
|
2007-08-27 22:07:36 +00:00
|
|
|
case 4:
|
|
|
|
case 8:
|
|
|
|
case 16:
|
|
|
|
case 32:
|
|
|
|
case 64:
|
|
|
|
break;
|
|
|
|
default:
|
2007-09-17 23:06:23 +00:00
|
|
|
goto en_done;
|
|
|
|
}
|
|
|
|
case USB_SPEED_LOW:
|
|
|
|
switch (max) {
|
|
|
|
case 1:
|
|
|
|
case 2:
|
|
|
|
case 4:
|
|
|
|
case 8:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
goto en_done;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
goto en_done;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
goto en_done;
|
|
|
|
}
|
|
|
|
|
2007-08-27 16:04:32 +00:00
|
|
|
|
|
|
|
/* here initialize variable of ep */
|
|
|
|
ep->maxpacket = max;
|
2007-08-28 20:29:28 +00:00
|
|
|
ep->desc = desc;
|
2007-08-27 16:04:32 +00:00
|
|
|
|
|
|
|
/* hardware special operation */
|
|
|
|
|
|
|
|
/* Init EPx Queue Head (Ep Capabilites field in QH
|
|
|
|
* according to max, zlt, mult) */
|
|
|
|
qh_init(ep->ep_num,
|
2007-08-28 20:29:28 +00:00
|
|
|
(desc->bEndpointAddress & USB_DIR_IN) ? USB_RECV : USB_SEND,
|
|
|
|
(unsigned char) (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK),
|
2007-08-27 16:04:32 +00:00
|
|
|
max, zlt, mult);
|
|
|
|
|
|
|
|
/* Init endpoint x at here */
|
2007-08-30 22:26:46 +00:00
|
|
|
ep_setup(ep->ep_num,
|
2007-08-29 00:33:16 +00:00
|
|
|
(unsigned char)(desc->bEndpointAddress & USB_DIR_IN) ?
|
|
|
|
USB_RECV : USB_SEND,
|
2007-08-28 20:29:28 +00:00
|
|
|
(unsigned char)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK));
|
2007-08-27 16:04:32 +00:00
|
|
|
|
|
|
|
/* Now HW will be NAKing transfers to that EP,
|
|
|
|
* until a buffer is queued to it. */
|
|
|
|
|
|
|
|
retval = 0;
|
2007-08-28 20:29:28 +00:00
|
|
|
switch (desc->bmAttributes & 0x03) {
|
2007-08-27 16:04:32 +00:00
|
|
|
case USB_ENDPOINT_XFER_BULK:
|
|
|
|
val = "bulk";
|
|
|
|
break;
|
|
|
|
case USB_ENDPOINT_XFER_ISOC:
|
|
|
|
val = "iso";
|
|
|
|
break;
|
|
|
|
case USB_ENDPOINT_XFER_INT:
|
|
|
|
val = "intr";
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
val = "ctrl";
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
logf("ep num %d", (int)ep->ep_num);
|
|
|
|
|
|
|
|
logf("enabled %s (ep%d%s-%s)", ep->name,
|
2007-08-28 20:29:28 +00:00
|
|
|
desc->bEndpointAddress & 0x0f,
|
|
|
|
(desc->bEndpointAddress & USB_DIR_IN) ? "in" : "out", val);
|
2007-08-27 16:04:32 +00:00
|
|
|
logf(" maxpacket %d", max);
|
|
|
|
|
2007-09-17 23:06:23 +00:00
|
|
|
en_done:
|
2007-08-27 16:04:32 +00:00
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
2007-09-17 22:23:51 +00:00
|
|
|
int usb_arcotg_dcd_disable(struct usb_ep* ep)
|
|
|
|
{
|
|
|
|
if (ep == NULL || ep->desc == NULL) {
|
|
|
|
logf("failed to disabled %s", ep ? ep->name : NULL);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ep->desc = NULL;
|
|
|
|
|
|
|
|
logf("disabled %s", ep->name);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-08-27 22:07:36 +00:00
|
|
|
int usb_arcotg_dcd_set_halt(struct usb_ep* ep, bool halt)
|
|
|
|
{
|
2007-08-27 16:04:32 +00:00
|
|
|
int status = -EOPNOTSUPP; /* operation not supported */
|
|
|
|
unsigned char dir = 0;
|
|
|
|
unsigned int tmp_epctrl = 0;
|
|
|
|
|
|
|
|
if (!ep) {
|
|
|
|
status = -EINVAL;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
|
|
|
|
status = -EOPNOTSUPP;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2007-08-30 19:23:37 +00:00
|
|
|
dir = ep_is_in(ep) ? USB_RECV : USB_SEND;
|
2007-08-27 16:04:32 +00:00
|
|
|
|
2007-08-30 22:20:24 +00:00
|
|
|
logf("modify halt of %d", ep->ep_num);
|
2007-08-27 16:04:32 +00:00
|
|
|
tmp_epctrl = UDC_ENDPTCTRL(ep->ep_num);
|
2007-08-30 22:20:24 +00:00
|
|
|
logf("reg %x", tmp_epctrl);
|
2007-08-27 16:04:32 +00:00
|
|
|
|
|
|
|
if (halt) {
|
2007-08-30 22:20:24 +00:00
|
|
|
logf("halting...");
|
2007-08-27 16:04:32 +00:00
|
|
|
/* set the stall bit */
|
|
|
|
if (dir) {
|
2007-08-30 22:20:24 +00:00
|
|
|
logf("..tx..");
|
2007-08-27 16:04:32 +00:00
|
|
|
tmp_epctrl |= EPCTRL_TX_EP_STALL;
|
|
|
|
} else {
|
2007-08-30 22:20:24 +00:00
|
|
|
logf("..rx..");
|
2007-08-27 16:04:32 +00:00
|
|
|
tmp_epctrl |= EPCTRL_RX_EP_STALL;
|
|
|
|
}
|
|
|
|
} else {
|
2007-08-30 22:20:24 +00:00
|
|
|
logf("UNhalting...");
|
2007-08-27 16:04:32 +00:00
|
|
|
/* clear the stall bit and reset data toggle */
|
|
|
|
if (dir) {
|
2007-08-30 22:20:24 +00:00
|
|
|
logf("..tx..");
|
2007-08-27 16:04:32 +00:00
|
|
|
tmp_epctrl &= ~EPCTRL_TX_EP_STALL;
|
|
|
|
tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
|
|
|
|
} else {
|
2007-08-30 22:20:24 +00:00
|
|
|
logf("..rx..");
|
2007-08-27 16:04:32 +00:00
|
|
|
tmp_epctrl &= ~EPCTRL_RX_EP_STALL;
|
|
|
|
tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
UDC_ENDPTCTRL(ep->ep_num) = tmp_epctrl;
|
2007-08-30 22:20:24 +00:00
|
|
|
logf("reg %x", tmp_epctrl);
|
2007-08-27 16:04:32 +00:00
|
|
|
|
|
|
|
out:
|
2007-08-30 22:20:24 +00:00
|
|
|
logf("%s %s halt", ep->name, halt ? "set" : "clear");
|
|
|
|
return 0;
|
2007-08-27 16:04:32 +00:00
|
|
|
}
|
|
|
|
|
2007-08-27 22:07:36 +00:00
|
|
|
int usb_arcotg_dcd_send(struct usb_ep* ep, struct usb_response* res)
|
|
|
|
{
|
2007-08-27 16:04:32 +00:00
|
|
|
char* ptr;
|
|
|
|
int todo, error, size, done = 0;
|
|
|
|
int index = 1; /* use as default ep0 tx qh and td */
|
|
|
|
struct dtd* td;
|
|
|
|
struct dqh* qh;
|
|
|
|
unsigned int mask;
|
|
|
|
|
|
|
|
if (res == NULL) {
|
|
|
|
logf("invalid input");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ep != NULL) {
|
|
|
|
index = ep->pipe_num;
|
|
|
|
}
|
|
|
|
|
|
|
|
ptr = res->buf;
|
|
|
|
size = res->length;
|
|
|
|
|
|
|
|
td = &dev_td[index];
|
|
|
|
qh = &dev_qh[index];
|
|
|
|
mask = 1 << (15 + index);
|
|
|
|
|
|
|
|
do {
|
|
|
|
/* calculate how much to copy and send */
|
|
|
|
todo = MIN(size, BUFFER_SIZE);
|
|
|
|
|
|
|
|
/* copy data to shared memory area */
|
|
|
|
memcpy(buffer, ptr, todo);
|
|
|
|
|
|
|
|
/* init transfer descriptor */
|
|
|
|
td_init(td, buffer, todo);
|
|
|
|
|
|
|
|
/* start transfer*/
|
|
|
|
error = td_enqueue(td, qh, mask);
|
|
|
|
|
|
|
|
if (error == 0) {
|
|
|
|
/* waiting for finished transfer */
|
|
|
|
error = td_wait(td, mask);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (error) {
|
|
|
|
done = error;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
size -= todo;
|
|
|
|
ptr += todo;
|
|
|
|
done += todo;
|
|
|
|
|
|
|
|
} while (size > 0);
|
|
|
|
|
|
|
|
logf("usb_send done %d",done);
|
|
|
|
return done;
|
|
|
|
}
|
|
|
|
|
2007-08-27 22:07:36 +00:00
|
|
|
int usb_arcotg_dcd_receive(struct usb_ep* ep, struct usb_response* res)
|
|
|
|
{
|
2007-08-27 16:04:32 +00:00
|
|
|
char* ptr;
|
|
|
|
int todo, error, size, done = 0;
|
|
|
|
int index = 0; /* use as default ep0 rx qh and td */
|
|
|
|
struct dtd* td;
|
|
|
|
struct dqh* qh;
|
|
|
|
unsigned int mask;
|
|
|
|
|
|
|
|
if (res == NULL) {
|
|
|
|
logf("invalid input");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ep != NULL) {
|
|
|
|
index = ep->pipe_num;
|
|
|
|
}
|
|
|
|
|
|
|
|
ptr = res->buf;
|
|
|
|
size = res->length;
|
|
|
|
|
|
|
|
td = &dev_td[index];
|
|
|
|
qh = &dev_qh[index];
|
|
|
|
mask = 1 << index;
|
|
|
|
|
|
|
|
do {
|
|
|
|
/* calculate how much to receive in one step */
|
|
|
|
todo = MIN(size, BUFFER_SIZE);
|
|
|
|
|
|
|
|
/* init transfer descritpor */
|
|
|
|
td_init(td, buffer, size);
|
|
|
|
|
|
|
|
/* start transfer */
|
|
|
|
error = td_enqueue(td, qh, mask);
|
|
|
|
|
|
|
|
if (error == 0) {
|
|
|
|
/* wait until transfer is finished */
|
|
|
|
error = td_wait(td, mask);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (error) {
|
|
|
|
done = error;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* copy receive data to buffer */
|
|
|
|
memcpy(ptr, buffer, todo);
|
|
|
|
|
|
|
|
size -= todo;
|
|
|
|
ptr += todo;
|
|
|
|
done += todo;
|
|
|
|
|
|
|
|
} while (size > 0);
|
|
|
|
|
|
|
|
logf("usb_recive done %d",done);
|
|
|
|
return done;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* lifecylce */
|
|
|
|
|
2007-08-29 00:33:16 +00:00
|
|
|
static void qh_init(unsigned char ep_num, unsigned char dir,
|
|
|
|
unsigned char ep_type, unsigned int max_pkt_len,
|
|
|
|
unsigned int zlt, unsigned char mult)
|
2007-08-27 22:07:36 +00:00
|
|
|
{
|
|
|
|
struct dqh *qh = &dev_qh[2 * ep_num + dir];
|
2007-08-27 16:04:32 +00:00
|
|
|
uint32_t tmp = 0;
|
|
|
|
memset(qh, 0, sizeof(struct dqh));
|
|
|
|
|
|
|
|
/* set the Endpoint Capabilites Reg of QH */
|
|
|
|
switch (ep_type) {
|
|
|
|
case USB_ENDPOINT_XFER_CONTROL:
|
|
|
|
/* Interrupt On Setup (IOS). for control ep */
|
|
|
|
tmp = (max_pkt_len << LENGTH_BIT_POS) | INTERRUPT_ON_COMPLETE;
|
|
|
|
break;
|
|
|
|
case USB_ENDPOINT_XFER_ISOC:
|
2007-08-29 00:33:16 +00:00
|
|
|
tmp = (max_pkt_len << LENGTH_BIT_POS) |
|
|
|
|
(mult << EP_QUEUE_HEAD_MULT_POS);
|
2007-08-27 16:04:32 +00:00
|
|
|
break;
|
|
|
|
case USB_ENDPOINT_XFER_BULK:
|
|
|
|
case USB_ENDPOINT_XFER_INT:
|
|
|
|
tmp = max_pkt_len << LENGTH_BIT_POS;
|
|
|
|
if (zlt) {
|
|
|
|
tmp |= EP_QUEUE_HEAD_ZLT_SEL;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
logf("error ep type is %d", ep_type);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* see 32.14.4.1 Queue Head Initialization */
|
|
|
|
|
2007-08-29 00:33:16 +00:00
|
|
|
/* write the wMaxPacketSize field as required by the USB Chapter9 or
|
|
|
|
application specific portocol */
|
2007-08-27 16:04:32 +00:00
|
|
|
qh->endpt_cap = tmp;
|
|
|
|
|
|
|
|
/* write the next dTD Terminate bit fild to 1 */
|
|
|
|
qh->dtd_ovrl.next_dtd = 1;
|
|
|
|
|
|
|
|
/* write the Active bit in the status field to 0 */
|
|
|
|
qh->dtd_ovrl.dtd_token &= ~STATUS_ACTIVE;
|
|
|
|
|
|
|
|
/* write the Hald bit in the status field to 0 */
|
|
|
|
qh->dtd_ovrl.dtd_token &= ~STATUS_HALTED;
|
|
|
|
|
|
|
|
logf("qh: init %d", (2 * ep_num + dir));
|
|
|
|
}
|
|
|
|
|
2007-08-27 22:07:36 +00:00
|
|
|
static void td_init(struct dtd* td, void* buffer, uint32_t todo)
|
|
|
|
{
|
2007-08-27 16:04:32 +00:00
|
|
|
/* see 32.14.5.2 Building a Transfer Descriptor */
|
|
|
|
|
|
|
|
/* init first 7 dwords with 0 */
|
|
|
|
memset(td, 0, sizeof(struct dtd)); /* set set all to 0 */
|
|
|
|
|
|
|
|
/* set terminate bit to 1*/
|
|
|
|
td->next_dtd = 1;
|
|
|
|
|
|
|
|
/* fill in total bytes with transfer size */
|
|
|
|
td->dtd_token = (todo << 16);
|
|
|
|
|
|
|
|
/* set interrupt on compilte if desierd */
|
|
|
|
td->dtd_token |= INTERRUPT_ON_COMPLETE;
|
|
|
|
|
2007-08-29 00:33:16 +00:00
|
|
|
/* initialize the status field with the active bit set to 1 and all
|
|
|
|
remaining status bits to 0 */
|
2007-08-27 16:04:32 +00:00
|
|
|
td->dtd_token |= STATUS_ACTIVE;
|
|
|
|
|
|
|
|
td->buf_ptr0 = (uint32_t)buffer;
|
|
|
|
}
|
|
|
|
|
2007-08-29 00:33:16 +00:00
|
|
|
static void ep_setup(unsigned char ep_num, unsigned char dir,
|
|
|
|
unsigned char ep_type)
|
2007-08-27 22:07:36 +00:00
|
|
|
{
|
2007-08-27 16:04:32 +00:00
|
|
|
unsigned int tmp_epctrl = 0;
|
|
|
|
struct timer t;
|
|
|
|
|
|
|
|
tmp_epctrl = UDC_ENDPTCTRL(ep_num);
|
|
|
|
if (dir) {
|
|
|
|
if (ep_num) {
|
|
|
|
tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
|
|
|
|
}
|
|
|
|
logf("tx enablde");
|
|
|
|
tmp_epctrl |= EPCTRL_TX_ENABLE;
|
|
|
|
tmp_epctrl |= ((unsigned int)(ep_type) << EPCTRL_TX_EP_TYPE_SHIFT);
|
|
|
|
} else {
|
|
|
|
if (ep_num) {
|
|
|
|
tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
|
|
|
|
}
|
|
|
|
logf("rx enablde");
|
|
|
|
tmp_epctrl |= EPCTRL_RX_ENABLE;
|
|
|
|
tmp_epctrl |= ((unsigned int)(ep_type) << EPCTRL_RX_EP_TYPE_SHIFT);
|
|
|
|
}
|
|
|
|
|
|
|
|
UDC_ENDPTCTRL(ep_num) = tmp_epctrl;
|
2007-08-27 22:07:36 +00:00
|
|
|
|
2007-08-27 16:04:32 +00:00
|
|
|
/* wait for the write reg to finish */
|
|
|
|
|
2007-08-27 22:07:36 +00:00
|
|
|
timer_set(&t, SETUP_TIMER);
|
2007-08-29 00:33:16 +00:00
|
|
|
while (!(UDC_ENDPTCTRL(ep_num) &
|
|
|
|
(tmp_epctrl & (EPCTRL_TX_ENABLE | EPCTRL_RX_ENABLE)))) {
|
2007-08-27 16:04:32 +00:00
|
|
|
if (timer_expired(&t)) {
|
2007-08-27 22:07:36 +00:00
|
|
|
logf("TIMEOUT: enable ep");
|
2007-08-27 16:04:32 +00:00
|
|
|
return;
|
2007-08-27 22:07:36 +00:00
|
|
|
}
|
2007-08-27 16:04:32 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* helpers for sending/receiving */
|
|
|
|
|
2007-08-27 22:07:36 +00:00
|
|
|
static int td_enqueue(struct dtd* td, struct dqh* qh, unsigned int mask)
|
|
|
|
{
|
2007-08-27 16:04:32 +00:00
|
|
|
struct timer t;
|
|
|
|
|
|
|
|
qh->dtd_ovrl.next_dtd = (unsigned int)td;
|
|
|
|
qh->dtd_ovrl.dtd_token &= ~0xc0;
|
|
|
|
|
|
|
|
timer_set(&t, PRIME_TIMER);
|
|
|
|
UDC_ENDPTPRIME |= mask;
|
|
|
|
|
|
|
|
while ((UDC_ENDPTPRIME & mask)) {
|
|
|
|
if (timer_expired(&t)) {
|
|
|
|
logf("timeout->prime");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((UDC_ENDPTSTAT & mask) == 0) {
|
|
|
|
logf("Endptstat 0x%x", UDC_ENDPTSTAT);
|
|
|
|
logf("HW_ERROR");
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-08-27 22:07:36 +00:00
|
|
|
static int td_wait(struct dtd* td, unsigned int mask)
|
|
|
|
{
|
2007-08-27 16:04:32 +00:00
|
|
|
struct timer t;
|
|
|
|
timer_set(&t, TRANSFER_TIMER);
|
|
|
|
|
|
|
|
for (;;) {
|
|
|
|
if ((UDC_ENDPTCOMPLETE & mask) != 0) {
|
|
|
|
UDC_ENDPTCOMPLETE |= mask;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((td->dtd_token & (1 << 7)) == 0) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (timer_expired(&t)) {
|
|
|
|
return ERROR_TIMEOUT;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-08-27 22:07:36 +00:00
|
|
|
static int usb_ack(struct usb_ctrlrequest * s, int error)
|
|
|
|
{
|
2007-08-27 16:04:32 +00:00
|
|
|
if (error) {
|
|
|
|
logf("STALLing ep0");
|
|
|
|
UDC_ENDPTCTRL0 |= 1 << 16; /* stall */
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
res.buf = NULL;
|
|
|
|
res.length = 0;
|
|
|
|
|
|
|
|
if (s->bRequestType & 0x80) {
|
|
|
|
return usb_arcotg_dcd_receive(NULL, &res);
|
|
|
|
} else {
|
|
|
|
return usb_arcotg_dcd_send(NULL, &res);
|
|
|
|
}
|
|
|
|
}
|