2006-08-01 22:28:14 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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2006-11-21 22:55:39 +00:00
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* Copyright (C) 2006 Daniel Ankers
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2006-08-01 22:28:14 +00:00
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "ata.h"
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2007-06-30 02:08:27 +00:00
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#include "hotswap-target.h"
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2006-11-21 22:55:39 +00:00
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#include "ata-target.h"
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2006-11-25 13:04:50 +00:00
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#include "ata_idle_notify.h"
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2006-11-21 22:55:39 +00:00
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#include "system.h"
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2006-08-01 22:28:14 +00:00
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#include <string.h>
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2006-11-21 22:55:39 +00:00
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#include "thread.h"
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2007-06-30 02:08:27 +00:00
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#include "led.h"
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#include "disk.h"
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2007-11-05 16:12:13 +00:00
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#include "cpu.h"
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2007-06-30 02:08:27 +00:00
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#include "panic.h"
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2007-07-25 06:15:07 +00:00
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#include "usb.h"
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2006-08-01 22:28:14 +00:00
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2006-11-21 22:55:39 +00:00
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#define BLOCK_SIZE (512)
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2006-08-01 22:28:14 +00:00
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#define SECTOR_SIZE (512)
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2006-12-21 18:32:47 +00:00
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#define BLOCKS_PER_BANK 0x7a7800
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2006-08-01 22:28:14 +00:00
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2006-11-21 22:55:39 +00:00
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#define STATUS_REG (*(volatile unsigned int *)(0x70008204))
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#define REG_1 (*(volatile unsigned int *)(0x70008208))
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#define UNKNOWN (*(volatile unsigned int *)(0x70008210))
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#define BLOCK_SIZE_REG (*(volatile unsigned int *)(0x7000821c))
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#define BLOCK_COUNT_REG (*(volatile unsigned int *)(0x70008220))
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#define REG_5 (*(volatile unsigned int *)(0x70008224))
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#define CMD_REG0 (*(volatile unsigned int *)(0x70008228))
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#define CMD_REG1 (*(volatile unsigned int *)(0x7000822c))
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#define CMD_REG2 (*(volatile unsigned int *)(0x70008230))
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#define RESPONSE_REG (*(volatile unsigned int *)(0x70008234))
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#define SD_STATE_REG (*(volatile unsigned int *)(0x70008238))
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#define REG_11 (*(volatile unsigned int *)(0x70008240))
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#define REG_12 (*(volatile unsigned int *)(0x70008244))
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#define DATA_REG (*(volatile unsigned int *)(0x70008280))
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2007-07-12 06:50:42 +00:00
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/* STATUS_REG bits */
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2006-11-21 22:55:39 +00:00
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#define DATA_DONE (1 << 12)
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#define CMD_DONE (1 << 13)
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#define ERROR_BITS (0x3f)
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2007-06-30 02:08:27 +00:00
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#define READY_FOR_DATA (1 << 8)
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2006-11-21 22:55:39 +00:00
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#define FIFO_FULL (1 << 7)
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#define FIFO_EMPTY (1 << 6)
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2007-07-12 06:50:42 +00:00
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#define CMD_OK 0x0 /* Command was successful */
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2007-08-22 00:32:45 +00:00
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#define CMD_ERROR_2 0x2 /* SD did not respond to command (either it doesn't
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understand the command or is not inserted) */
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2007-07-12 06:50:42 +00:00
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2006-11-21 22:55:39 +00:00
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/* SD States */
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#define IDLE 0
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#define READY 1
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#define IDENT 2
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#define STBY 3
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#define TRAN 4
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#define DATA 5
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#define RCV 6
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#define PRG 7
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#define DIS 8
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2007-07-25 06:15:07 +00:00
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#define FIFO_LEN 16 /* FIFO is 16 words deep */
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2006-11-21 22:55:39 +00:00
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/* SD Commands */
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2007-06-30 02:08:27 +00:00
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#define GO_IDLE_STATE 0
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#define ALL_SEND_CID 2
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#define SEND_RELATIVE_ADDR 3
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#define SET_DSR 4
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#define SWITCH_FUNC 6
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#define SELECT_CARD 7
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#define DESELECT_CARD 7
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2007-08-22 00:32:45 +00:00
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#define SEND_IF_COND 8
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2007-06-30 02:08:27 +00:00
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#define SEND_CSD 9
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#define SEND_CID 10
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#define STOP_TRANSMISSION 12
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#define SEND_STATUS 13
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#define GO_INACTIVE_STATE 15
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#define SET_BLOCKLEN 16
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#define READ_SINGLE_BLOCK 17
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#define READ_MULTIPLE_BLOCK 18
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#define SEND_NUM_WR_BLOCKS 22
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#define WRITE_BLOCK 24
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#define WRITE_MULTIPLE_BLOCK 25
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#define ERASE_WR_BLK_START 32
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#define ERASE_WR_BLK_END 33
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#define ERASE 38
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#define APP_CMD 55
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2007-07-25 06:15:07 +00:00
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#define EC_OK 0
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#define EC_FAILED 1
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#define EC_NOCARD 2
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#define EC_WAIT_STATE_FAILED 3
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#define EC_CHECK_TIMEOUT_FAILED 4
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#define EC_POWER_UP 5
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#define EC_READ_TIMEOUT 6
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#define EC_WRITE_TIMEOUT 7
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#define EC_TRAN_SEL_BANK 8
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#define EC_TRAN_READ_ENTRY 9
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#define EC_TRAN_READ_EXIT 10
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#define EC_TRAN_WRITE_ENTRY 11
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#define EC_TRAN_WRITE_EXIT 12
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#define EC_FIFO_SEL_BANK_EMPTY 13
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#define EC_FIFO_SEL_BANK_DONE 14
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#define EC_FIFO_ENA_BANK_EMPTY 15
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#define EC_FIFO_READ_FULL 16
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#define EC_FIFO_WR_EMPTY 17
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#define EC_FIFO_WR_DONE 18
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#define EC_COMMAND 19
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#define NUM_EC 20
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2006-11-21 22:55:39 +00:00
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/* Application Specific commands */
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#define SET_BUS_WIDTH 6
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#define SD_APP_OP_COND 41
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2007-07-25 06:15:07 +00:00
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/** global, exported variables **/
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2007-10-08 20:39:46 +00:00
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#ifdef HAVE_HOTSWAP
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#define NUM_VOLUMES 2
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#else
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#define NUM_VOLUMES 1
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#endif
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2007-07-25 06:15:07 +00:00
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2007-06-30 02:08:27 +00:00
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/* for compatibility */
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2006-08-01 22:28:14 +00:00
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int ata_spinup_time = 0;
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2007-06-30 02:08:27 +00:00
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2006-08-01 22:28:14 +00:00
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long last_disk_activity = -1;
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2007-07-25 06:15:07 +00:00
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/** static, private data **/
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2007-06-30 02:08:27 +00:00
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static bool initialized = false;
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2007-07-25 06:15:07 +00:00
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static long next_yield = 0;
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2007-11-20 22:45:46 +00:00
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#define MIN_YIELD_PERIOD 1000
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2006-08-01 22:28:14 +00:00
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2006-11-21 22:55:39 +00:00
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static tSDCardInfo card_info[2];
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2007-07-25 06:15:07 +00:00
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static tSDCardInfo *currcard = NULL; /* current active card */
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struct sd_card_status
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{
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int retry;
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int retry_max;
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};
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2007-10-08 20:39:46 +00:00
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static struct sd_card_status sd_status[NUM_VOLUMES] =
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2007-07-25 06:15:07 +00:00
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{
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{ 0, 1 },
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2007-10-08 20:39:46 +00:00
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#ifdef HAVE_HOTSWAP
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2007-07-25 06:15:07 +00:00
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{ 0, 10 }
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2007-10-08 20:39:46 +00:00
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#endif
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2007-07-25 06:15:07 +00:00
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};
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2006-08-01 22:28:14 +00:00
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2007-06-30 02:08:27 +00:00
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/* Shoot for around 75% usage */
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static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x1c0)/sizeof(long)];
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static const char sd_thread_name[] = "ata/sd";
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2008-01-18 13:12:33 +00:00
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static struct mutex sd_mtx NOCACHEBSS_ATTR;
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2006-11-25 13:04:50 +00:00
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static struct event_queue sd_queue;
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2007-06-30 02:08:27 +00:00
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/* Posted when card plugged status has changed */
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#define SD_HOTSWAP 1
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2007-07-25 06:15:07 +00:00
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/* Actions taken by sd_thread when card status has changed */
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enum sd_thread_actions
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{
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SDA_NONE = 0x0,
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SDA_UNMOUNTED = 0x1,
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SDA_MOUNTED = 0x2
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};
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2006-08-01 22:28:14 +00:00
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2006-11-21 22:55:39 +00:00
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/* Private Functions */
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2006-08-01 22:28:14 +00:00
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2007-07-25 06:15:07 +00:00
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static unsigned int check_time[NUM_EC];
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2007-06-30 02:08:27 +00:00
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2007-07-25 06:15:07 +00:00
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static inline bool sd_check_timeout(long timeout, int id)
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2006-08-01 22:28:14 +00:00
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{
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2007-07-25 06:15:07 +00:00
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return !TIME_AFTER(USEC_TIMER, check_time[id] + timeout);
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2007-06-30 02:08:27 +00:00
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}
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2007-07-25 06:15:07 +00:00
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static bool sd_poll_status(unsigned int trigger, long timeout)
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2007-06-30 02:08:27 +00:00
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{
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2007-07-25 06:15:07 +00:00
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long t = USEC_TIMER;
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2007-06-30 02:08:27 +00:00
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while ((STATUS_REG & trigger) == 0)
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2006-11-21 22:55:39 +00:00
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{
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2007-07-25 06:15:07 +00:00
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long time = USEC_TIMER;
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if (TIME_AFTER(time, next_yield))
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2006-11-21 22:55:39 +00:00
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{
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2007-07-25 06:15:07 +00:00
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long ty = USEC_TIMER;
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priority_yield();
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timeout += USEC_TIMER - ty;
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next_yield = ty + MIN_YIELD_PERIOD;
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}
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2007-06-30 02:08:27 +00:00
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2007-07-25 06:15:07 +00:00
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if (TIME_AFTER(time, t + timeout))
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2007-06-30 02:08:27 +00:00
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return false;
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}
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return true;
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2006-08-01 22:28:14 +00:00
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}
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2007-07-25 06:15:07 +00:00
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static int sd_command(unsigned int cmd, unsigned long arg1,
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unsigned int *response, unsigned int type)
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2006-08-01 22:28:14 +00:00
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{
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2007-06-30 02:08:27 +00:00
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int i, words; /* Number of 16 bit words to read from RESPONSE_REG */
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unsigned int data[9];
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2007-07-12 06:50:42 +00:00
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CMD_REG0 = cmd;
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CMD_REG1 = (unsigned int)((arg1 & 0xffff0000) >> 16);
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CMD_REG2 = (unsigned int)((arg1 & 0xffff));
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UNKNOWN = type;
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2007-06-30 02:08:27 +00:00
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2007-07-25 06:15:07 +00:00
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if (!sd_poll_status(CMD_DONE, 100000))
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return -EC_COMMAND;
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2007-06-30 02:08:27 +00:00
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2007-07-12 06:50:42 +00:00
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if ((STATUS_REG & ERROR_BITS) != CMD_OK)
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2007-07-25 06:15:07 +00:00
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/* Error sending command */
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return -EC_COMMAND - (STATUS_REG & ERROR_BITS)*100;
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2006-11-21 22:55:39 +00:00
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2007-07-12 06:50:42 +00:00
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if (cmd == GO_IDLE_STATE)
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2007-07-25 06:15:07 +00:00
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return 0; /* no response here */
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2007-06-30 02:08:27 +00:00
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words = (type == 2) ? 9 : 3;
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2006-11-21 22:55:39 +00:00
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for (i = 0; i < words; i++) /* RESPONSE_REG is read MSB first */
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2007-06-30 02:08:27 +00:00
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data[i] = RESPONSE_REG; /* Read most significant 16-bit word */
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2006-11-21 22:55:39 +00:00
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2007-07-25 06:15:07 +00:00
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if (response == NULL)
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{
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/* response discarded */
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}
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else if (type == 2)
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2006-11-21 22:55:39 +00:00
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{
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2007-06-30 02:08:27 +00:00
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/* Response type 2 has the following structure:
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* [135:135] Start Bit - '0'
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* [134:134] Transmission bit - '0'
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* [133:128] Reserved - '111111'
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* [127:001] CID or CSD register including internal CRC7
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* [000:000] End Bit - '1'
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*/
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2007-07-25 06:15:07 +00:00
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response[3] = (data[0]<<24) + (data[1]<<8) + (data[2]>>8);
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response[2] = (data[2]<<24) + (data[3]<<8) + (data[4]>>8);
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response[1] = (data[4]<<24) + (data[5]<<8) + (data[6]>>8);
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response[0] = (data[6]<<24) + (data[7]<<8) + (data[8]>>8);
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2007-06-30 02:08:27 +00:00
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}
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else
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{
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2007-08-22 00:32:45 +00:00
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/* Response types 1, 1b, 3, 6, 7 have the following structure:
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2007-06-30 02:08:27 +00:00
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* Types 4 and 5 are not supported.
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*
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* [47] Start bit - '0'
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* [46] Transmission bit - '0'
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2007-08-22 00:32:45 +00:00
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* [45:40] R1, R1b, R6, R7: Command index
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2007-06-30 02:08:27 +00:00
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* R3: Reserved - '111111'
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* [39:8] R1, R1b: Card Status
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* R3: OCR Register
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* R6: [31:16] RCA
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* [15: 0] Card Status Bits 23, 22, 19, 12:0
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* [23] COM_CRC_ERROR
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* [22] ILLEGAL_COMMAND
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* [19] ERROR
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* [12:9] CURRENT_STATE
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* [8] READY_FOR_DATA
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* [7:6]
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* [5] APP_CMD
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* [4]
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* [3] AKE_SEQ_ERROR
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* [2] Reserved
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* [1:0] Reserved for test mode
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2007-08-22 00:32:45 +00:00
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* R7: [19:16] Voltage accepted
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* [15:8] echo-back of check pattern
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2007-06-30 02:08:27 +00:00
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* [7:1] R1, R1b: CRC7
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* R3: Reserved - '1111111'
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* [0] End Bit - '1'
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*/
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2007-07-25 06:15:07 +00:00
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response[0] = (data[0]<<24) + (data[1]<<8) + (data[2]>>8);
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2006-11-21 22:55:39 +00:00
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}
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2006-08-01 22:28:14 +00:00
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|
|
2007-07-25 06:15:07 +00:00
|
|
|
return 0;
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
static int sd_wait_for_state(unsigned int state, int id)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2006-11-21 22:55:39 +00:00
|
|
|
unsigned int response = 0;
|
2007-07-25 06:15:07 +00:00
|
|
|
unsigned int timeout = 0x80000;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
check_time[id] = USEC_TIMER;
|
|
|
|
|
|
|
|
while (1)
|
2006-11-21 22:55:39 +00:00
|
|
|
{
|
2007-07-25 06:15:07 +00:00
|
|
|
int ret = sd_command(SEND_STATUS, currcard->rca, &response, 1);
|
|
|
|
long us;
|
|
|
|
|
|
|
|
if (ret < 0)
|
|
|
|
return ret*100 - id;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
if (((response >> 9) & 0xf) == state)
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
|
|
|
SD_STATE_REG = state;
|
|
|
|
return 0;
|
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
if (!sd_check_timeout(timeout, id))
|
|
|
|
return -EC_WAIT_STATE_FAILED*100 - id;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
us = USEC_TIMER;
|
|
|
|
if (TIME_AFTER(us, next_yield))
|
|
|
|
{
|
|
|
|
priority_yield();
|
|
|
|
timeout += USEC_TIMER - us;
|
|
|
|
next_yield = us + MIN_YIELD_PERIOD;
|
|
|
|
}
|
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
static inline void copy_read_sectors_fast(unsigned char **buf)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2007-06-30 02:08:27 +00:00
|
|
|
/* Copy one chunk of 16 words using best method for start alignment */
|
|
|
|
switch ( (intptr_t)*buf & 3 )
|
|
|
|
{
|
|
|
|
case 0:
|
|
|
|
asm volatile (
|
|
|
|
"ldmia %[data], { r2-r9 } \r\n"
|
|
|
|
"orr r2, r2, r3, lsl #16 \r\n"
|
|
|
|
"orr r4, r4, r5, lsl #16 \r\n"
|
|
|
|
"orr r6, r6, r7, lsl #16 \r\n"
|
|
|
|
"orr r8, r8, r9, lsl #16 \r\n"
|
|
|
|
"stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
|
|
|
|
"ldmia %[data], { r2-r9 } \r\n"
|
|
|
|
"orr r2, r2, r3, lsl #16 \r\n"
|
|
|
|
"orr r4, r4, r5, lsl #16 \r\n"
|
|
|
|
"orr r6, r6, r7, lsl #16 \r\n"
|
|
|
|
"orr r8, r8, r9, lsl #16 \r\n"
|
|
|
|
"stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
|
|
|
|
: [buf]"+&r"(*buf)
|
|
|
|
: [data]"r"(&DATA_REG)
|
|
|
|
: "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9"
|
|
|
|
);
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
asm volatile (
|
|
|
|
"ldmia %[data], { r2-r9 } \r\n"
|
|
|
|
"orr r3, r2, r3, lsl #16 \r\n"
|
|
|
|
"strb r3, [%[buf]], #1 \r\n"
|
|
|
|
"mov r3, r3, lsr #8 \r\n"
|
|
|
|
"strh r3, [%[buf]], #2 \r\n"
|
|
|
|
"mov r3, r3, lsr #16 \r\n"
|
|
|
|
"orr r3, r3, r4, lsl #8 \r\n"
|
|
|
|
"orr r3, r3, r5, lsl #24 \r\n"
|
|
|
|
"mov r5, r5, lsr #8 \r\n"
|
|
|
|
"orr r5, r5, r6, lsl #8 \r\n"
|
|
|
|
"orr r5, r5, r7, lsl #24 \r\n"
|
|
|
|
"mov r7, r7, lsr #8 \r\n"
|
|
|
|
"orr r7, r7, r8, lsl #8 \r\n"
|
|
|
|
"orr r7, r7, r9, lsl #24 \r\n"
|
|
|
|
"mov r2, r9, lsr #8 \r\n"
|
|
|
|
"stmia %[buf]!, { r3, r5, r7 } \r\n"
|
|
|
|
"ldmia %[data], { r3-r10 } \r\n"
|
|
|
|
"orr r2, r2, r3, lsl #8 \r\n"
|
|
|
|
"orr r2, r2, r4, lsl #24 \r\n"
|
|
|
|
"mov r4, r4, lsr #8 \r\n"
|
|
|
|
"orr r4, r4, r5, lsl #8 \r\n"
|
|
|
|
"orr r4, r4, r6, lsl #24 \r\n"
|
|
|
|
"mov r6, r6, lsr #8 \r\n"
|
|
|
|
"orr r6, r6, r7, lsl #8 \r\n"
|
|
|
|
"orr r6, r6, r8, lsl #24 \r\n"
|
|
|
|
"mov r8, r8, lsr #8 \r\n"
|
|
|
|
"orr r8, r8, r9, lsl #8 \r\n"
|
|
|
|
"orr r8, r8, r10, lsl #24 \r\n"
|
|
|
|
"mov r10, r10, lsr #8 \r\n"
|
|
|
|
"stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
|
|
|
|
"strb r10, [%[buf]], #1 \r\n"
|
|
|
|
: [buf]"+&r"(*buf)
|
|
|
|
: [data]"r"(&DATA_REG)
|
|
|
|
: "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
|
|
|
|
);
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
asm volatile (
|
|
|
|
"ldmia %[data], { r2-r9 } \r\n"
|
|
|
|
"strh r2, [%[buf]], #2 \r\n"
|
|
|
|
"orr r3, r3, r4, lsl #16 \r\n"
|
|
|
|
"orr r5, r5, r6, lsl #16 \r\n"
|
|
|
|
"orr r7, r7, r8, lsl #16 \r\n"
|
|
|
|
"stmia %[buf]!, { r3, r5, r7 } \r\n"
|
|
|
|
"ldmia %[data], { r2-r8, r10 } \r\n"
|
|
|
|
"orr r2, r9, r2, lsl #16 \r\n"
|
|
|
|
"orr r3, r3, r4, lsl #16 \r\n"
|
|
|
|
"orr r5, r5, r6, lsl #16 \r\n"
|
|
|
|
"orr r7, r7, r8, lsl #16 \r\n"
|
|
|
|
"stmia %[buf]!, { r2, r3, r5, r7 } \r\n"
|
|
|
|
"strh r10, [%[buf]], #2 \r\n"
|
|
|
|
: [buf]"+&r"(*buf)
|
|
|
|
: [data]"r"(&DATA_REG)
|
|
|
|
: "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
|
|
|
|
);
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
asm volatile (
|
|
|
|
"ldmia %[data], { r2-r9 } \r\n"
|
|
|
|
"orr r3, r2, r3, lsl #16 \r\n"
|
|
|
|
"strb r3, [%[buf]], #1 \r\n"
|
|
|
|
"mov r3, r3, lsr #8 \r\n"
|
|
|
|
"orr r3, r3, r4, lsl #24 \r\n"
|
|
|
|
"mov r4, r4, lsr #8 \r\n"
|
|
|
|
"orr r5, r4, r5, lsl #8 \r\n"
|
|
|
|
"orr r5, r5, r6, lsl #24 \r\n"
|
|
|
|
"mov r6, r6, lsr #8 \r\n"
|
|
|
|
"orr r7, r6, r7, lsl #8 \r\n"
|
|
|
|
"orr r7, r7, r8, lsl #24 \r\n"
|
|
|
|
"mov r8, r8, lsr #8 \r\n"
|
|
|
|
"orr r2, r8, r9, lsl #8 \r\n"
|
|
|
|
"stmia %[buf]!, { r3, r5, r7 } \r\n"
|
|
|
|
"ldmia %[data], { r3-r10 } \r\n"
|
|
|
|
"orr r2, r2, r3, lsl #24 \r\n"
|
|
|
|
"mov r3, r3, lsr #8 \r\n"
|
|
|
|
"orr r4, r3, r4, lsl #8 \r\n"
|
|
|
|
"orr r4, r4, r5, lsl #24 \r\n"
|
|
|
|
"mov r5, r5, lsr #8 \r\n"
|
|
|
|
"orr r6, r5, r6, lsl #8 \r\n"
|
|
|
|
"orr r6, r6, r7, lsl #24 \r\n"
|
|
|
|
"mov r7, r7, lsr #8 \r\n"
|
|
|
|
"orr r8, r7, r8, lsl #8 \r\n"
|
|
|
|
"orr r8, r8, r9, lsl #24 \r\n"
|
|
|
|
"mov r9, r9, lsr #8 \r\n"
|
|
|
|
"orr r10, r9, r10, lsl #8 \r\n"
|
|
|
|
"stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
|
|
|
|
"strh r10, [%[buf]], #2 \r\n"
|
|
|
|
"mov r10, r10, lsr #16 \r\n"
|
|
|
|
"strb r10, [%[buf]], #1 \r\n"
|
|
|
|
: [buf]"+&r"(*buf)
|
|
|
|
: [data]"r"(&DATA_REG)
|
|
|
|
: "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
|
|
|
|
);
|
|
|
|
break;
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
static inline void copy_read_sectors_slow(unsigned char** buf)
|
|
|
|
{
|
2007-07-25 06:15:07 +00:00
|
|
|
int cnt = FIFO_LEN;
|
2007-06-30 02:08:27 +00:00
|
|
|
int t;
|
|
|
|
|
|
|
|
/* Copy one chunk of 16 words */
|
|
|
|
asm volatile (
|
|
|
|
"1: \r\n"
|
|
|
|
"ldrh %[t], [%[data]] \r\n"
|
|
|
|
"strb %[t], [%[buf]], #1 \r\n"
|
|
|
|
"mov %[t], %[t], lsr #8 \r\n"
|
|
|
|
"strb %[t], [%[buf]], #1 \r\n"
|
|
|
|
"subs %[cnt], %[cnt], #1 \r\n"
|
|
|
|
"bgt 1b \r\n"
|
|
|
|
: [cnt]"+&r"(cnt), [buf]"+&r"(*buf),
|
|
|
|
[t]"=&r"(t)
|
|
|
|
: [data]"r"(&DATA_REG)
|
|
|
|
);
|
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
/* Writes have to be kept slow for now */
|
2007-07-25 06:15:07 +00:00
|
|
|
static inline void copy_write_sectors(const unsigned char** buf)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2007-07-25 06:15:07 +00:00
|
|
|
int cnt = FIFO_LEN;
|
|
|
|
unsigned t;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-02-04 03:20:36 +00:00
|
|
|
do
|
|
|
|
{
|
2007-07-25 06:15:07 +00:00
|
|
|
t = *(*buf)++;
|
|
|
|
t |= *(*buf)++ << 8;
|
|
|
|
DATA_REG = t;
|
|
|
|
} while (--cnt > 0); /* tail loop is faster */
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
static int sd_select_bank(unsigned char bank)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2006-11-21 22:55:39 +00:00
|
|
|
unsigned char card_data[512];
|
2007-07-25 06:15:07 +00:00
|
|
|
const unsigned char* write_buf;
|
|
|
|
int i, ret;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
memset(card_data, 0, 512);
|
2007-07-25 06:15:07 +00:00
|
|
|
|
|
|
|
ret = sd_wait_for_state(TRAN, EC_TRAN_SEL_BANK);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
BLOCK_SIZE_REG = 512;
|
|
|
|
BLOCK_COUNT_REG = 1;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_command(35, 0, NULL, 0x1c0d); /* CMD35 is vendor specific */
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
SD_STATE_REG = PRG;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
card_data[0] = bank;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
/* Write the card data */
|
|
|
|
write_buf = card_data;
|
2007-07-25 06:15:07 +00:00
|
|
|
for (i = 0; i < BLOCK_SIZE/2; i += FIFO_LEN)
|
2007-06-30 02:08:27 +00:00
|
|
|
{
|
|
|
|
/* Wait for the FIFO to empty */
|
2007-07-25 06:15:07 +00:00
|
|
|
if (sd_poll_status(FIFO_EMPTY, 10000))
|
|
|
|
{
|
|
|
|
copy_write_sectors(&write_buf); /* Copy one chunk of 16 words */
|
|
|
|
continue;
|
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
return -EC_FIFO_SEL_BANK_EMPTY;
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
if (!sd_poll_status(DATA_DONE, 10000))
|
|
|
|
return -EC_FIFO_SEL_BANK_DONE;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
currcard->current_bank = bank;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
return 0;
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
static void sd_card_mux(int card_no)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2007-07-25 06:15:07 +00:00
|
|
|
/* Set the current card mux */
|
2007-09-06 03:28:58 +00:00
|
|
|
#ifdef SANSA_E200
|
2007-06-30 02:08:27 +00:00
|
|
|
if (card_no == 0)
|
|
|
|
{
|
2007-11-05 16:12:13 +00:00
|
|
|
GPO32_VAL |= 0x4;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x7a);
|
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x7a);
|
|
|
|
GPIO_SET_BITWISE(GPIOD_ENABLE, 0x1f);
|
|
|
|
GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x1f);
|
|
|
|
GPIO_SET_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
outl((inl(0x70000014) & ~(0x3ffff)) | 0x255aa, 0x70000014);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2007-11-05 16:12:13 +00:00
|
|
|
GPO32_VAL &= ~0x4;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOD_ENABLE, 0x1f);
|
|
|
|
GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
|
|
|
|
GPIO_SET_BITWISE(GPIOA_ENABLE, 0x7a);
|
|
|
|
GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x7a);
|
|
|
|
GPIO_SET_BITWISE( GPIOA_OUTPUT_EN, 0x7a);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
outl(inl(0x70000014) & ~(0x3ffff), 0x70000014);
|
|
|
|
}
|
2007-09-06 03:28:58 +00:00
|
|
|
#else /* SANSA_C200 */
|
|
|
|
if (card_no == 0)
|
|
|
|
{
|
2007-11-05 16:12:13 +00:00
|
|
|
GPO32_VAL |= 0x4;
|
2007-09-06 03:28:58 +00:00
|
|
|
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOD_ENABLE, 0x1f);
|
|
|
|
GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
|
|
|
|
GPIO_SET_BITWISE(GPIOA_ENABLE, 0x7a);
|
|
|
|
GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x7a);
|
|
|
|
GPIO_SET_BITWISE( GPIOA_OUTPUT_EN, 0x7a);
|
2007-09-06 03:28:58 +00:00
|
|
|
|
|
|
|
outl(inl(0x70000014) & ~(0x3ffff), 0x70000014);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2007-11-05 16:12:13 +00:00
|
|
|
GPO32_VAL &= ~0x4;
|
2007-09-06 03:28:58 +00:00
|
|
|
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x7a);
|
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x7a);
|
|
|
|
GPIO_SET_BITWISE(GPIOD_ENABLE, 0x1f);
|
|
|
|
GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x1f);
|
|
|
|
GPIO_SET_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
|
2007-09-06 03:28:58 +00:00
|
|
|
|
|
|
|
outl((inl(0x70000014) & ~(0x3ffff)) | 0x255aa, 0x70000014);
|
|
|
|
}
|
|
|
|
#endif
|
2007-07-25 06:15:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void sd_init_device(int card_no)
|
|
|
|
{
|
|
|
|
/* SD Protocol registers */
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-08-22 00:32:45 +00:00
|
|
|
unsigned int response = 0;
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif
|
2007-07-25 06:15:07 +00:00
|
|
|
unsigned int i;
|
|
|
|
unsigned int c_size;
|
|
|
|
unsigned long c_mult;
|
|
|
|
unsigned char carddata[512];
|
|
|
|
unsigned char *dataptr;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* Enable and initialise controller */
|
|
|
|
REG_1 = 6;
|
|
|
|
|
|
|
|
/* Initialise card data as blank */
|
|
|
|
memset(currcard, 0, sizeof(*currcard));
|
|
|
|
|
|
|
|
/* Switch card mux to card to initialize */
|
|
|
|
sd_card_mux(card_no);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
/* Init NAND */
|
2007-06-30 02:08:27 +00:00
|
|
|
REG_11 |= (1 << 15);
|
|
|
|
REG_12 |= (1 << 15);
|
2006-11-21 22:55:39 +00:00
|
|
|
REG_12 &= ~(3 << 12);
|
2007-06-30 02:08:27 +00:00
|
|
|
REG_12 |= (1 << 13);
|
2006-11-21 22:55:39 +00:00
|
|
|
REG_11 &= ~(3 << 12);
|
2007-06-30 02:08:27 +00:00
|
|
|
REG_11 |= (1 << 13);
|
|
|
|
|
|
|
|
DEV_EN |= DEV_ATA; /* Enable controller */
|
|
|
|
DEV_RS |= DEV_ATA; /* Reset controller */
|
|
|
|
DEV_RS &=~DEV_ATA; /* Clear Reset */
|
2006-11-21 22:55:39 +00:00
|
|
|
|
|
|
|
SD_STATE_REG = TRAN;
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
REG_5 = 0xf;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_command(GO_IDLE_STATE, 0, NULL, 256);
|
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
check_time[EC_POWER_UP] = USEC_TIMER;
|
2007-10-08 20:39:46 +00:00
|
|
|
|
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-08-22 00:32:45 +00:00
|
|
|
/* Check for SDHC:
|
|
|
|
- non-SDHC cards simply ignore SEND_IF_COND (CMD8) and we get error -219,
|
|
|
|
which we can just ignore and assume we're dealing with standard SD.
|
|
|
|
- SDHC cards echo back the argument into the response. This is how we
|
|
|
|
tell if the card is SDHC.
|
|
|
|
*/
|
|
|
|
ret = sd_command(SEND_IF_COND,0x1aa, &response,7);
|
|
|
|
if ( (ret < 0) && (ret!=-219) )
|
|
|
|
goto card_init_error;
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif
|
2007-08-22 00:32:45 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
while ((currcard->ocr & (1 << 31)) == 0) /* until card is powered up */
|
2006-11-21 22:55:39 +00:00
|
|
|
{
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_command(APP_CMD, currcard->rca, NULL, 1);
|
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-08-22 00:32:45 +00:00
|
|
|
if(response == 0x1aa)
|
|
|
|
{
|
|
|
|
/* SDHC */
|
|
|
|
ret = sd_command(SD_APP_OP_COND, (1<<30)|0x100000,
|
|
|
|
&currcard->ocr, 3);
|
2007-10-08 20:39:46 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
#endif /* HAVE_HOTSWAP */
|
|
|
|
{
|
2007-08-22 00:32:45 +00:00
|
|
|
/* SD Standard */
|
|
|
|
ret = sd_command(SD_APP_OP_COND, 0x100000, &currcard->ocr, 3);
|
|
|
|
}
|
2007-10-08 20:39:46 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
if (!sd_check_timeout(5000000, EC_POWER_UP))
|
|
|
|
{
|
|
|
|
ret = -EC_POWER_UP;
|
|
|
|
goto card_init_error;
|
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_command(ALL_SEND_CID, 0, currcard->cid, 2);
|
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_command(SEND_RELATIVE_ADDR, 0, &currcard->rca, 1);
|
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_command(SEND_CSD, currcard->rca, currcard->csd, 2);
|
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
|
|
|
/* These calculations come from the Sandisk SD card product manual */
|
2007-08-22 00:32:45 +00:00
|
|
|
if( (currcard->csd[3]>>30) == 0)
|
|
|
|
{
|
|
|
|
/* CSD version 1.0 */
|
|
|
|
c_size = ((currcard->csd[2] & 0x3ff) << 2) + (currcard->csd[1]>>30) + 1;
|
|
|
|
c_mult = 4 << ((currcard->csd[1] >> 15) & 7);
|
|
|
|
currcard->max_read_bl_len = 1 << ((currcard->csd[2] >> 16) & 15);
|
|
|
|
currcard->block_size = BLOCK_SIZE; /* Always use 512 byte blocks */
|
|
|
|
currcard->numblocks = c_size * c_mult * (currcard->max_read_bl_len/512);
|
|
|
|
currcard->capacity = currcard->numblocks * currcard->block_size;
|
|
|
|
}
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-08-22 00:32:45 +00:00
|
|
|
else if( (currcard->csd[3]>>30) == 1)
|
|
|
|
{
|
|
|
|
/* CSD version 2.0 */
|
|
|
|
c_size = ((currcard->csd[2] & 0x3f) << 16) + (currcard->csd[1]>>16) + 1;
|
|
|
|
currcard->max_read_bl_len = 1 << ((currcard->csd[2] >> 16) & 0xf);
|
|
|
|
currcard->block_size = BLOCK_SIZE; /* Always use 512 byte blocks */
|
2008-02-09 21:07:44 +00:00
|
|
|
currcard->numblocks = c_size << 10;
|
2007-08-22 00:32:45 +00:00
|
|
|
currcard->capacity = currcard->numblocks * currcard->block_size;
|
|
|
|
}
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif /* HAVE_HOTSWAP */
|
2007-08-22 00:32:45 +00:00
|
|
|
|
2006-11-21 22:55:39 +00:00
|
|
|
REG_1 = 0;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_command(SELECT_CARD, currcard->rca, NULL, 129);
|
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_command(APP_CMD, currcard->rca, NULL, 1);
|
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_command(SET_BUS_WIDTH, currcard->rca | 2, NULL, 1); /* 4 bit */
|
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_command(SET_BLOCKLEN, currcard->block_size, NULL, 1);
|
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
BLOCK_SIZE_REG = currcard->block_size;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-08-22 00:32:45 +00:00
|
|
|
/* If this card is >4GB & not SDHC, then we need to enable bank switching */
|
|
|
|
if( (currcard->numblocks >= BLOCKS_PER_BANK) &&
|
|
|
|
((currcard->ocr & (1<<30)) == 0) )
|
2006-11-21 22:55:39 +00:00
|
|
|
{
|
|
|
|
SD_STATE_REG = TRAN;
|
|
|
|
BLOCK_COUNT_REG = 1;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_command(SWITCH_FUNC, 0x80ffffef, NULL, 0x1c05);
|
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2006-11-21 22:55:39 +00:00
|
|
|
/* Read 512 bytes from the card.
|
|
|
|
The first 512 bits contain the status information
|
|
|
|
TODO: Do something useful with this! */
|
|
|
|
dataptr = carddata;
|
2007-07-25 06:15:07 +00:00
|
|
|
for (i = 0; i < BLOCK_SIZE/2; i += FIFO_LEN)
|
2006-11-21 22:55:39 +00:00
|
|
|
{
|
|
|
|
/* Wait for the FIFO to be full */
|
2007-07-25 06:15:07 +00:00
|
|
|
if (sd_poll_status(FIFO_FULL, 100000))
|
|
|
|
{
|
|
|
|
copy_read_sectors_slow(&dataptr);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = -EC_FIFO_ENA_BANK_EMPTY;
|
|
|
|
goto card_init_error;
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-12 06:50:42 +00:00
|
|
|
currcard->initialized = 1;
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* Card failed to initialize so disable it */
|
|
|
|
card_init_error:
|
2007-07-25 06:15:07 +00:00
|
|
|
currcard->initialized = ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* lock must already be aquired */
|
|
|
|
static void sd_select_device(int card_no)
|
|
|
|
{
|
|
|
|
currcard = &card_info[card_no];
|
|
|
|
|
|
|
|
if (card_no == 0)
|
|
|
|
{
|
|
|
|
/* Main card always gets a chance */
|
|
|
|
sd_status[0].retry = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (currcard->initialized > 0)
|
|
|
|
{
|
|
|
|
/* This card is already initialized - switch to it */
|
|
|
|
sd_card_mux(card_no);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (currcard->initialized == 0)
|
|
|
|
{
|
|
|
|
/* Card needs (re)init */
|
|
|
|
sd_init_device(card_no);
|
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2006-11-21 22:55:39 +00:00
|
|
|
/* API Functions */
|
2006-08-01 22:28:14 +00:00
|
|
|
|
2006-11-21 22:55:39 +00:00
|
|
|
void ata_led(bool onoff)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2007-06-30 02:08:27 +00:00
|
|
|
led(onoff);
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2007-10-08 20:39:46 +00:00
|
|
|
int ata_read_sectors(IF_MV2(int drive,) unsigned long start, int incount,
|
2006-08-01 22:28:14 +00:00
|
|
|
void* inbuf)
|
|
|
|
{
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifndef HAVE_HOTSWAP
|
|
|
|
const int drive = 0;
|
|
|
|
#endif
|
2007-07-25 06:15:07 +00:00
|
|
|
int ret;
|
2007-06-30 02:08:27 +00:00
|
|
|
unsigned char *buf, *buf_end;
|
|
|
|
int bank;
|
|
|
|
|
2006-11-21 22:55:39 +00:00
|
|
|
/* TODO: Add DMA support. */
|
|
|
|
|
2008-01-18 13:12:33 +00:00
|
|
|
mutex_lock(&sd_mtx);
|
2006-11-21 22:55:39 +00:00
|
|
|
|
|
|
|
ata_led(true);
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ata_read_retry:
|
2007-11-06 07:21:08 +00:00
|
|
|
if (drive != 0 && !card_detect_target())
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
2007-06-30 02:08:27 +00:00
|
|
|
/* no external sd-card inserted */
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = -EC_NOCARD;
|
2007-06-30 02:08:27 +00:00
|
|
|
goto ata_read_error;
|
2007-07-25 06:15:07 +00:00
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
sd_select_device(drive);
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
if (currcard->initialized < 0)
|
|
|
|
{
|
|
|
|
ret = currcard->initialized;
|
|
|
|
goto ata_read_error;
|
2007-07-12 06:50:42 +00:00
|
|
|
}
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
last_disk_activity = current_tick;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-08-22 00:32:45 +00:00
|
|
|
/* Only switch banks with non-SDHC cards */
|
|
|
|
if((currcard->ocr & (1<<30))==0)
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
2007-08-22 00:32:45 +00:00
|
|
|
bank = start / BLOCKS_PER_BANK;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-08-22 00:32:45 +00:00
|
|
|
if (currcard->current_bank != bank)
|
|
|
|
{
|
|
|
|
ret = sd_select_bank(bank);
|
|
|
|
if (ret < 0)
|
|
|
|
goto ata_read_error;
|
|
|
|
}
|
|
|
|
|
|
|
|
start -= bank * BLOCKS_PER_BANK;
|
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_wait_for_state(TRAN, EC_TRAN_READ_ENTRY);
|
|
|
|
if (ret < 0)
|
|
|
|
goto ata_read_error;
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
BLOCK_COUNT_REG = incount;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-08-22 00:32:45 +00:00
|
|
|
if(currcard->ocr & (1<<30) )
|
|
|
|
{
|
|
|
|
/* SDHC */
|
|
|
|
ret = sd_command(READ_MULTIPLE_BLOCK, start, NULL, 0x1c25);
|
|
|
|
}
|
|
|
|
else
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif
|
2007-08-22 00:32:45 +00:00
|
|
|
{
|
|
|
|
ret = sd_command(READ_MULTIPLE_BLOCK, start * BLOCK_SIZE, NULL, 0x1c25);
|
|
|
|
}
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto ata_read_error;
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
/* TODO: Don't assume BLOCK_SIZE == SECTOR_SIZE */
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
buf_end = (unsigned char *)inbuf + incount * currcard->block_size;
|
|
|
|
for (buf = inbuf; buf < buf_end;)
|
|
|
|
{
|
|
|
|
/* Wait for the FIFO to be full */
|
2007-07-25 06:15:07 +00:00
|
|
|
if (sd_poll_status(FIFO_FULL, 0x80000))
|
|
|
|
{
|
|
|
|
copy_read_sectors_fast(&buf); /* Copy one chunk of 16 words */
|
|
|
|
/* TODO: Switch bank if necessary */
|
|
|
|
continue;
|
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = -EC_FIFO_READ_FULL;
|
|
|
|
goto ata_read_error;
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
last_disk_activity = current_tick;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_command(STOP_TRANSMISSION, 0, NULL, 1);
|
|
|
|
if (ret < 0)
|
|
|
|
goto ata_read_error;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_wait_for_state(TRAN, EC_TRAN_READ_EXIT);
|
|
|
|
if (ret < 0)
|
|
|
|
goto ata_read_error;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
while (1)
|
|
|
|
{
|
|
|
|
ata_led(false);
|
2008-01-18 13:12:33 +00:00
|
|
|
mutex_unlock(&sd_mtx);
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
return ret;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ata_read_error:
|
|
|
|
if (sd_status[drive].retry < sd_status[drive].retry_max
|
|
|
|
&& ret != -EC_NOCARD)
|
|
|
|
{
|
|
|
|
sd_status[drive].retry++;
|
|
|
|
currcard->initialized = 0;
|
|
|
|
goto ata_read_retry;
|
|
|
|
}
|
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2007-10-08 20:39:46 +00:00
|
|
|
int ata_write_sectors(IF_MV2(int drive,) unsigned long start, int count,
|
2007-06-30 02:08:27 +00:00
|
|
|
const void* outbuf)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2006-11-21 22:55:39 +00:00
|
|
|
/* Write support is not finished yet */
|
2007-06-30 02:08:27 +00:00
|
|
|
/* TODO: The standard suggests using ACMD23 prior to writing multiple blocks
|
2006-11-21 22:55:39 +00:00
|
|
|
to improve performance */
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifndef HAVE_HOTSWAP
|
|
|
|
const int drive = 0;
|
|
|
|
#endif
|
2007-07-25 06:15:07 +00:00
|
|
|
int ret;
|
|
|
|
const unsigned char *buf, *buf_end;
|
2007-06-30 02:08:27 +00:00
|
|
|
int bank;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2008-01-18 13:12:33 +00:00
|
|
|
mutex_lock(&sd_mtx);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2006-11-21 22:55:39 +00:00
|
|
|
ata_led(true);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ata_write_retry:
|
2007-11-06 07:21:08 +00:00
|
|
|
if (drive != 0 && !card_detect_target())
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
2007-06-30 02:08:27 +00:00
|
|
|
/* no external sd-card inserted */
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = -EC_NOCARD;
|
2007-07-12 06:50:42 +00:00
|
|
|
goto ata_write_error;
|
2007-07-25 06:15:07 +00:00
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
sd_select_device(drive);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
if (currcard->initialized < 0)
|
|
|
|
{
|
|
|
|
ret = currcard->initialized;
|
|
|
|
goto ata_write_error;
|
2007-07-12 06:50:42 +00:00
|
|
|
}
|
|
|
|
|
2007-08-22 00:32:45 +00:00
|
|
|
/* Only switch banks with non-SDHC cards */
|
|
|
|
if((currcard->ocr & (1<<30))==0)
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
2007-08-22 00:32:45 +00:00
|
|
|
bank = start / BLOCKS_PER_BANK;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-08-22 00:32:45 +00:00
|
|
|
if (currcard->current_bank != bank)
|
|
|
|
{
|
|
|
|
ret = sd_select_bank(bank);
|
|
|
|
if (ret < 0)
|
|
|
|
goto ata_write_error;
|
|
|
|
}
|
|
|
|
|
|
|
|
start -= bank * BLOCKS_PER_BANK;
|
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
check_time[EC_WRITE_TIMEOUT] = USEC_TIMER;
|
2007-07-25 06:15:07 +00:00
|
|
|
|
|
|
|
ret = sd_wait_for_state(TRAN, EC_TRAN_WRITE_ENTRY);
|
|
|
|
if (ret < 0)
|
|
|
|
goto ata_write_error;
|
|
|
|
|
2006-11-21 22:55:39 +00:00
|
|
|
BLOCK_COUNT_REG = count;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-08-22 00:32:45 +00:00
|
|
|
if(currcard->ocr & (1<<30) )
|
|
|
|
{
|
|
|
|
/* SDHC */
|
|
|
|
ret = sd_command(WRITE_MULTIPLE_BLOCK, start, NULL, 0x1c2d);
|
|
|
|
}
|
|
|
|
else
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif
|
2007-08-22 00:32:45 +00:00
|
|
|
{
|
|
|
|
ret = sd_command(WRITE_MULTIPLE_BLOCK, start*BLOCK_SIZE, NULL, 0x1c2d);
|
|
|
|
}
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto ata_write_error;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
buf_end = outbuf + count * currcard->block_size - 2*FIFO_LEN;
|
|
|
|
|
|
|
|
for (buf = outbuf; buf <= buf_end;)
|
2006-11-21 22:55:39 +00:00
|
|
|
{
|
2007-07-25 06:15:07 +00:00
|
|
|
if (buf == buf_end)
|
2006-11-21 22:55:39 +00:00
|
|
|
{
|
|
|
|
/* Set SD_STATE_REG to PRG for the last buffer fill */
|
|
|
|
SD_STATE_REG = PRG;
|
|
|
|
}
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
udelay(2); /* needed here (loop is too fast :-) */
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
/* Wait for the FIFO to empty */
|
2007-07-25 06:15:07 +00:00
|
|
|
if (sd_poll_status(FIFO_EMPTY, 0x80000))
|
|
|
|
{
|
|
|
|
copy_write_sectors(&buf); /* Copy one chunk of 16 words */
|
|
|
|
/* TODO: Switch bank if necessary */
|
|
|
|
continue;
|
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = -EC_FIFO_WR_EMPTY;
|
|
|
|
goto ata_write_error;
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
last_disk_activity = current_tick;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
if (!sd_poll_status(DATA_DONE, 0x80000))
|
|
|
|
{
|
|
|
|
ret = -EC_FIFO_WR_DONE;
|
|
|
|
goto ata_write_error;
|
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_command(STOP_TRANSMISSION, 0, NULL, 1);
|
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto ata_write_error;
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = sd_wait_for_state(TRAN, EC_TRAN_WRITE_EXIT);
|
|
|
|
if (ret < 0)
|
|
|
|
goto ata_write_error;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
while (1)
|
|
|
|
{
|
|
|
|
ata_led(false);
|
2008-01-18 13:12:33 +00:00
|
|
|
mutex_unlock(&sd_mtx);
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
return ret;
|
2007-04-23 23:26:23 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ata_write_error:
|
|
|
|
if (sd_status[drive].retry < sd_status[drive].retry_max
|
|
|
|
&& ret != -EC_NOCARD)
|
|
|
|
{
|
|
|
|
sd_status[drive].retry++;
|
|
|
|
currcard->initialized = 0;
|
|
|
|
goto ata_write_retry;
|
|
|
|
}
|
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
static void sd_thread(void) __attribute__((noreturn));
|
2006-11-25 13:04:50 +00:00
|
|
|
static void sd_thread(void)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2007-10-16 01:25:17 +00:00
|
|
|
struct queue_event ev;
|
2006-11-25 13:04:50 +00:00
|
|
|
bool idle_notified = false;
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
while (1)
|
|
|
|
{
|
2006-11-25 13:04:50 +00:00
|
|
|
queue_wait_w_tmo(&sd_queue, &ev, HZ);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2006-11-25 13:04:50 +00:00
|
|
|
switch ( ev.id )
|
|
|
|
{
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2008-03-09 14:49:10 +00:00
|
|
|
case SYS_HOTSWAP_INSERTED:
|
2008-03-12 02:50:07 +00:00
|
|
|
mutex_lock(&sd_mtx); /* Lock-out card activity */
|
|
|
|
card_info[1].initialized = 0;
|
|
|
|
sd_status[1].retry = 0;
|
|
|
|
disk_unmount(1); /* Force remount */
|
2008-03-09 14:49:10 +00:00
|
|
|
disk_mount(1); /* mount microSD card */
|
|
|
|
queue_broadcast(SYS_FS_CHANGED, 0);
|
2008-03-12 02:50:07 +00:00
|
|
|
mutex_unlock(&sd_mtx);
|
2007-06-30 02:08:27 +00:00
|
|
|
break;
|
2008-03-09 14:49:10 +00:00
|
|
|
|
|
|
|
case SYS_HOTSWAP_EXTRACTED:
|
2008-03-12 02:50:07 +00:00
|
|
|
mutex_lock(&sd_mtx); /* Lock-out card activity */
|
|
|
|
card_info[1].initialized = 0;
|
|
|
|
sd_status[1].retry = 0;
|
2008-03-09 14:49:10 +00:00
|
|
|
disk_unmount(1); /* release "by force" */
|
|
|
|
queue_broadcast(SYS_FS_CHANGED, 0);
|
2008-03-12 02:50:07 +00:00
|
|
|
mutex_unlock(&sd_mtx);
|
2008-03-09 14:49:10 +00:00
|
|
|
break;
|
|
|
|
#endif
|
2007-06-30 02:08:27 +00:00
|
|
|
case SYS_TIMEOUT:
|
|
|
|
if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
|
|
|
|
{
|
|
|
|
idle_notified = false;
|
|
|
|
}
|
2007-07-25 06:15:07 +00:00
|
|
|
else
|
2007-06-30 02:08:27 +00:00
|
|
|
{
|
2007-07-25 06:15:07 +00:00
|
|
|
/* never let a timer wrap confuse us */
|
|
|
|
next_yield = USEC_TIMER;
|
|
|
|
|
|
|
|
if (!idle_notified)
|
|
|
|
{
|
|
|
|
call_ata_idle_notifys(false);
|
|
|
|
idle_notified = true;
|
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
}
|
|
|
|
break;
|
2007-07-25 06:15:07 +00:00
|
|
|
case SYS_USB_CONNECTED:
|
|
|
|
usb_acknowledge(SYS_USB_CONNECTED_ACK);
|
|
|
|
/* Wait until the USB cable is extracted again */
|
|
|
|
usb_wait_for_disconnect(&sd_queue);
|
2008-03-09 14:49:10 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
break;
|
2008-02-28 22:51:39 +00:00
|
|
|
case SYS_USB_DISCONNECTED:
|
|
|
|
usb_acknowledge(SYS_USB_DISCONNECTED_ACK);
|
|
|
|
break;
|
2006-11-25 13:04:50 +00:00
|
|
|
}
|
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2006-11-25 13:04:50 +00:00
|
|
|
|
2006-08-01 22:28:14 +00:00
|
|
|
void ata_spindown(int seconds)
|
|
|
|
{
|
|
|
|
(void)seconds;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool ata_disk_is_active(void)
|
|
|
|
{
|
2007-06-30 02:08:27 +00:00
|
|
|
return 0;
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void ata_sleep(void)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
void ata_spin(void)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
|
|
|
|
int ata_hard_reset(void)
|
|
|
|
{
|
2007-06-30 02:08:27 +00:00
|
|
|
return 0;
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int ata_soft_reset(void)
|
|
|
|
{
|
2007-06-30 02:08:27 +00:00
|
|
|
return 0;
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void ata_enable(bool on)
|
|
|
|
{
|
2007-04-23 23:26:23 +00:00
|
|
|
if(on)
|
|
|
|
{
|
|
|
|
DEV_EN |= DEV_ATA; /* Enable controller */
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
DEV_EN &= ~DEV_ATA; /* Disable controller */
|
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int ata_init(void)
|
|
|
|
{
|
2007-07-12 06:50:42 +00:00
|
|
|
int ret = 0;
|
|
|
|
|
2008-01-18 12:32:03 +00:00
|
|
|
if (!initialized)
|
2008-01-18 13:12:33 +00:00
|
|
|
mutex_init(&sd_mtx);
|
2008-01-18 12:32:03 +00:00
|
|
|
|
2008-01-18 13:12:33 +00:00
|
|
|
mutex_lock(&sd_mtx);
|
2008-01-18 12:32:03 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
ata_led(false);
|
|
|
|
|
|
|
|
if (!initialized)
|
2006-11-25 13:04:50 +00:00
|
|
|
{
|
|
|
|
initialized = true;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
/* init controller */
|
|
|
|
outl(inl(0x70000088) & ~(0x4), 0x70000088);
|
|
|
|
outl(inl(0x7000008c) & ~(0x4), 0x7000008c);
|
2007-11-05 17:19:00 +00:00
|
|
|
GPO32_ENABLE |= 0x4;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_SET_BITWISE(GPIOG_ENABLE, (0x3 << 5));
|
|
|
|
GPIO_SET_BITWISE(GPIOG_OUTPUT_EN, (0x3 << 5));
|
|
|
|
GPIO_SET_BITWISE(GPIOG_OUTPUT_VAL, (0x3 << 5));
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-06-30 02:08:27 +00:00
|
|
|
/* enable card detection port - mask interrupt first */
|
2007-11-04 13:22:17 +00:00
|
|
|
#ifdef SANSA_E200
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x80);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x80);
|
|
|
|
GPIO_SET_BITWISE(GPIOA_ENABLE, 0x80);
|
2007-11-04 13:22:17 +00:00
|
|
|
#elif defined SANSA_C200
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOL_INT_EN, 0x08);
|
2007-11-04 13:22:17 +00:00
|
|
|
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOL_OUTPUT_EN, 0x08);
|
|
|
|
GPIO_SET_BITWISE(GPIOL_ENABLE, 0x08);
|
2007-11-04 13:22:17 +00:00
|
|
|
#endif
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif
|
2007-07-25 06:15:07 +00:00
|
|
|
sd_select_device(0);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
if (currcard->initialized < 0)
|
|
|
|
ret = currcard->initialized;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
queue_init(&sd_queue, true);
|
2007-10-16 01:25:17 +00:00
|
|
|
create_thread(sd_thread, sd_stack, sizeof(sd_stack), 0,
|
2008-02-11 07:42:11 +00:00
|
|
|
sd_thread_name IF_PRIO(, PRIORITY_USER_INTERFACE)
|
|
|
|
IF_COP(, CPU));
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
/* enable interupt for the mSD card */
|
|
|
|
sleep(HZ/10);
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-11-04 13:22:17 +00:00
|
|
|
#ifdef SANSA_E200
|
2007-06-30 02:08:27 +00:00
|
|
|
CPU_INT_EN = HI_MASK;
|
|
|
|
CPU_HI_INT_EN = GPIO0_MASK;
|
|
|
|
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIOA_INT_LEV = (0x80 << 8) | (~GPIOA_INPUT_VAL & 0x80);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
GPIOA_INT_CLR = 0x80;
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_SET_BITWISE(GPIOA_INT_EN, 0x80);
|
2007-11-04 13:22:17 +00:00
|
|
|
#elif defined SANSA_C200
|
|
|
|
CPU_INT_EN = HI_MASK;
|
|
|
|
CPU_HI_INT_EN = GPIO2_MASK;
|
|
|
|
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIOL_INT_LEV = (0x08 << 8) | (~GPIOL_INPUT_VAL & 0x08);
|
2007-11-04 13:22:17 +00:00
|
|
|
|
|
|
|
GPIOL_INT_CLR = 0x08;
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_SET_BITWISE(GPIOL_INT_EN, 0x08);
|
2007-11-04 13:22:17 +00:00
|
|
|
#endif
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif
|
2006-11-25 13:04:50 +00:00
|
|
|
}
|
|
|
|
|
2008-01-18 13:12:33 +00:00
|
|
|
mutex_unlock(&sd_mtx);
|
2008-01-18 12:32:03 +00:00
|
|
|
|
2007-07-12 06:50:42 +00:00
|
|
|
return ret;
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
/* move the sd-card info to mmc struct */
|
|
|
|
tCardInfo *card_get_info_target(int card_no)
|
|
|
|
{
|
|
|
|
int i, temp;
|
|
|
|
static tCardInfo card;
|
|
|
|
static const char mantissa[] = { /* *10 */
|
|
|
|
0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 };
|
|
|
|
static const int exponent[] = { /* use varies */
|
|
|
|
1,10,100,1000,10000,100000,1000000,10000000,100000000,1000000000 };
|
|
|
|
|
|
|
|
card.initialized = card_info[card_no].initialized;
|
|
|
|
card.ocr = card_info[card_no].ocr;
|
|
|
|
for(i=0; i<4; i++) card.csd[i] = card_info[card_no].csd[3-i];
|
|
|
|
for(i=0; i<4; i++) card.cid[i] = card_info[card_no].cid[3-i];
|
|
|
|
card.numblocks = card_info[card_no].numblocks;
|
|
|
|
card.blocksize = card_info[card_no].block_size;
|
|
|
|
card.size = card_info[card_no].capacity < 0xffffffff ?
|
|
|
|
card_info[card_no].capacity : 0xffffffff;
|
|
|
|
card.block_exp = card_info[card_no].block_exp;
|
|
|
|
temp = card_extract_bits(card.csd, 29, 3);
|
|
|
|
card.speed = mantissa[card_extract_bits(card.csd, 25, 4)]
|
|
|
|
* exponent[temp > 2 ? 7 : temp + 4];
|
|
|
|
card.nsac = 100 * card_extract_bits(card.csd, 16, 8);
|
|
|
|
temp = card_extract_bits(card.csd, 13, 3);
|
|
|
|
card.tsac = mantissa[card_extract_bits(card.csd, 9, 4)]
|
|
|
|
* exponent[temp] / 10;
|
|
|
|
card.cid[0] = htobe32(card.cid[0]); /* ascii chars here */
|
|
|
|
card.cid[1] = htobe32(card.cid[1]); /* ascii chars here */
|
|
|
|
temp = *((char*)card.cid+13); /* adjust year<=>month, 1997 <=> 2000 */
|
|
|
|
*((char*)card.cid+13) = (unsigned char)((temp >> 4) | (temp << 4)) + 3;
|
|
|
|
|
|
|
|
return &card;
|
|
|
|
}
|
|
|
|
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-06-30 02:08:27 +00:00
|
|
|
bool card_detect_target(void)
|
|
|
|
{
|
2007-11-04 13:22:17 +00:00
|
|
|
#ifdef SANSA_E200
|
|
|
|
return (GPIOA_INPUT_VAL & 0x80) == 0; /* low active */
|
|
|
|
#elif defined SANSA_C200
|
|
|
|
return (GPIOL_INPUT_VAL & 0x08) != 0; /* high active */
|
|
|
|
#endif
|
2007-06-30 02:08:27 +00:00
|
|
|
}
|
|
|
|
|
2007-07-29 04:49:19 +00:00
|
|
|
static bool sd1_oneshot_callback(struct timeout *tmo)
|
|
|
|
{
|
2008-03-09 14:49:10 +00:00
|
|
|
(void)tmo;
|
|
|
|
|
|
|
|
/* This is called only if the state was stable for 300ms - check state
|
|
|
|
* and post appropriate event. */
|
|
|
|
if (card_detect_target())
|
|
|
|
queue_broadcast(SYS_HOTSWAP_INSERTED, 0);
|
|
|
|
else
|
|
|
|
queue_broadcast(SYS_HOTSWAP_EXTRACTED, 0);
|
|
|
|
|
2007-07-29 04:49:19 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
/* called on insertion/removal interrupt */
|
|
|
|
void microsd_int(void)
|
|
|
|
{
|
2007-07-29 04:49:19 +00:00
|
|
|
static struct timeout sd1_oneshot;
|
|
|
|
|
2007-11-04 13:22:17 +00:00
|
|
|
#ifdef SANSA_E200
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x80);
|
|
|
|
GPIOA_INT_LEV = (0x80 << 8) | (~GPIOA_INPUT_VAL & 0x80);
|
2007-07-25 06:15:07 +00:00
|
|
|
GPIOA_INT_CLR = 0x80;
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_SET_BITWISE(GPIOA_INT_EN, 0x80);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-11-04 13:22:17 +00:00
|
|
|
#elif defined SANSA_C200
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOL_INT_EN, 0x08);
|
|
|
|
GPIOL_INT_LEV = (0x08 << 8) | (~GPIOL_INPUT_VAL & 0x08);
|
2007-11-04 13:22:17 +00:00
|
|
|
GPIOL_INT_CLR = 0x08;
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_SET_BITWISE(GPIOL_INT_EN, 0x08);
|
2007-11-04 13:22:17 +00:00
|
|
|
#endif
|
2008-03-09 14:49:10 +00:00
|
|
|
timeout_register(&sd1_oneshot, sd1_oneshot_callback, (3*HZ/10), 0);
|
2007-11-04 13:22:17 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
}
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif /* HAVE_HOTSWAP */
|