2009-10-26 18:16:58 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2009 by Bob Cousins
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef _UDA1341_H
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#define _UDA1341_H
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/* volume/balance/treble/bass interdependency */
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#define VOLUME_MIN -840
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#define VOLUME_MAX 0
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2009-11-01 22:58:08 +00:00
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#define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP)
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2009-10-26 18:16:58 +00:00
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extern int tenthdb2master(int db);
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extern int tenthdb2mixer(int db);
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extern void audiohw_set_master_vol(int vol_l, int vol_r);
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extern void audiohw_set_mixer_vol(int channel1, int channel2);
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2009-11-01 22:58:08 +00:00
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/* These are logical register numbers for driver */
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enum uda_register {
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UDA_REG_ID_STATUS_0,
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UDA_REG_ID_STATUS_1,
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UDA_REG_ID_CTRL0,
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UDA_REG_ID_CTRL1,
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UDA_REG_ID_CTRL2,
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UDA_REG_ID_EXT_0,
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UDA_REG_ID_EXT_1,
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UDA_REG_ID_EXT_2,
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UDA_REG_ID_EXT_4,
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UDA_REG_ID_EXT_5,
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UDA_REG_ID_EXT_6,
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NUM_REG_ID
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};
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2009-10-26 18:16:58 +00:00
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/* Address byte */
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#define UDA1341_ADDR 0x14
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#define UDA_REG_DATA0 0x00
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#define UDA_REG_DATA1 0x01
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#define UDA_REG_STATUS 0x02
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/* STATUS */
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#define UDA_STATUS_0 (0 << 7)
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#define UDA_STATUS_1 (1 << 7)
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#define UDA_RESET (1 << 6)
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#define UDA_SYSCLK_512FS (0 << 4)
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#define UDA_SYSCLK_384FS (1 << 4)
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#define UDA_SYSCLK_256FS (2 << 4)
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#define I2S_IFMT_IIS (0 << 1)
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#define I2S_IFMT_LSB16 (1 << 1)
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#define I2S_IFMT_LSB18 (2 << 1)
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#define I2S_IFMT_LSB20 (3 << 1)
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#define I2S_IFMT_MSB (4 << 1)
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#define I2S_IFMT_LSB16_OFMT_MSB (5 << 1)
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#define I2S_IFMT_LSB18_OFMT_MSB (6 << 1)
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#define I2S_IFMT_LSB20_OFMT_MSB (7 << 1)
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#define UDA_DC_FILTER (1 << 0)
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#define UDA_OUTPUT_GAIN (1 << 6)
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#define UDA_INPUT_GAIN (1 << 5)
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#define UDA_ADC_INVERT (1 << 4)
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#define UDA_DAC_INVERT (1 << 3)
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#define UDA_DOUBLE_SPEED (1 << 2)
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#define UDA_POWER_ADC_ON (1 << 1)
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#define UDA_POWER_DAC_ON (1 << 0)
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/* DATA0 */
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2009-11-01 22:58:08 +00:00
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#define UDA_DATA_CTRL0 (0 << 6) /* volume */
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#define UDA_DATA_CTRL1 (1 << 6) /* bass, treble */
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#define UDA_DATA_CTRL2 (2 << 6) /* peak det pos, de-emp, mute */
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2009-10-26 18:16:58 +00:00
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#define UDA_DATA_EXT_ADDR (6 << 5)
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#define UDA_DATA_EXT_DATA (7 << 5)
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2009-11-01 22:58:08 +00:00
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#define UDA_VOLUME(x) ((x) << 0) /* 1=0dB, 61=-60dB */
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2009-10-26 18:16:58 +00:00
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#define UDA_BASS_BOOST(x) ((x) << 2) /* see datasheet */
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2009-11-01 22:58:08 +00:00
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#define UDA_BASS_BOOST_MASK 0x0F
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2009-10-26 18:16:58 +00:00
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#define UDA_TREBLE(x) ((x) << 0) /* see datasheet */
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2009-11-01 22:58:08 +00:00
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#define UDA_TREBLE_MASK 0x03
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2009-10-26 18:16:58 +00:00
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2009-11-01 22:58:08 +00:00
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#define UDA_PEAK_DETECT_POS_BEFORE (0 << 5)
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#define UDA_PEAK_DETECT_POS_AFTER (1 << 5)
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2009-10-26 18:16:58 +00:00
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#define UDA_DE_EMPHASIS_NONE (0 << 3)
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#define UDA_DE_EMPHASIS_32 (1 << 3)
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#define UDA_DE_EMPHASIS_44_1 (2 << 3)
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#define UDA_DE_EMPHASIS_48 (3 << 3)
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2009-11-01 22:58:08 +00:00
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#define UDA_MUTE_ON (1 << 2)
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#define UDA_MUTE_OFF (0 << 2)
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2009-10-26 18:16:58 +00:00
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#define UDA_MODE_SWITCH_FLAT (0 << 0)
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#define UDA_MODE_SWITCH_MIN (1 << 0)
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#define UDA_MODE_SWITCH_MAX (3 << 0)
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#define UDA_EXT_0 (0 << 5) /* Mixer Gain Chan 1 */
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#define UDA_EXT_1 (1 << 5) /* Mixer Gain Chan 2 */
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#define UDA_EXT_2 (2 << 5) /* Mic sens and mixer mode */
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#define UDA_EXT_4 (4 << 5) /* AGC, Input amp gain */
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#define UDA_EXT_5 (5 << 5) /* Input amp gain */
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#define UDA_EXT_6 (6 << 5) /* AGC settings */
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/* TODO: DATA0 extended registers */
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/* DATA1: see datasheet */
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#endif /* _UDA_1341_H */
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